arXiv subjects

Yann Beilliard

Publications and source records attributed to Yann Beilliard.

21 records · Page 2Linked to original sources

arXiv2020

Conductive filament evolution dynamics revealed by cryogenic (1.5 K) multilevel switching of CMOS-compatible Al2O3/TiO2 resistive memories

This study demonstrates multilevel switching at 1.5 K of Al2O3/TiO2-x resistive memory devices fabricated with CMOS-compatible processes and materials. The I-V characteristics exhibit a negative differential resistance (NDR) effect due to a Joule-heating-induced metal-insulator transition of the Ti4O7 conductive filament. Carrier transport analysis of all multilevel switching I-V curves show that while the insulating regime follows the space charge limited current (SCLC) model for all resistance states, the conduction in the metallic regime is dominated by SCLC and trap-assisted tunneling (TAT) for low- and high-resistance states respectively. A non-monotonic conductance evolution is observed in the insulating regime, as opposed to the continuous and gradual conductance increase and decrease obtained in the metallic regime during the multilevel SET and RESET operations. Cryogenic transport analysis coupled to an analytical model accounting for the metal-insulator-transition-induced NDR effects and the resistance states of the device provide new insights on the conductive filament evolution dynamics and resistive switching mechanisms. Our findings suggest that the non-monotonic conductance evolution in the insulating regime is due to the combined effects of longitudinal and radial variations of the Ti4O7 conductive filament during the switching. This behavior results from the interplay between temperature- and field-dependent geometrical and physical characteristics of the filament.

physics.app-ph↗

arXiv2019

Observation of Highly Nonlinear Resistive Switching of Al2O3/TiO2-x Memristors at Cryogenic Temperature (1.5 K)

In this work, we investigate the behavior of Al2O3/TiO2-x cross-point memristors in cryogenic environment. We report successful resistive switching of memristor devices from 300 K down to 1.5 K. The I-V curves exhibit negative differential resistance effects between 130 and 1.5 K, attributed to a metal-insulator transition (MIT) of the Ti4O7 conductive filament. The resulting highly nonlinear behavior is associated to a maximum ION/IOFF ratio of 84 at 1.5 K, paving the way to selector-free cryogenic passive crossbars. Finally, temperature-dependant thermal activation energies related to the conductance at low bias (20 mV) are extracted for memristors in low resistance state, suggesting hopping-type conduction mechanisms.

physics.app-ph↗

arXiv2019

FPGA-based Multi-Chip Module for High-Performance Computing

Current integration, architectural design and manufacturing technologies are not suited for the computing density and power efficiency requested by Exascale computing. New approaches in hardware architecture are thus needed to overcome the technological barriers preventing the transition to the Exascale era. In that scope, we report successful fabrication of first ExaNoDe's MCM prototypes dedicated to Exascale computing applications. Each MCM was composed of 2 Xilinx Zynq Ultrascale+ MPSoC, assembled on advanced 68.5 mm x 55 mm laminate substrates specifically designed and fabricated for the project. Acoustic microscopy, x-ray, cross-section and Thermo-Moire investigations revealed no voids, shorts, delamination, cracks or warpage issues. Two MCMs were mounted on a daughter board by FORTH for testing purposes. The DDR memories on the 4 SODIMMs of the daughter board were successfully tested by running extensive Xilinx memory tests with clock frequencies of 1866 MHz and 2133 MHz. All 4 FPGAs were programmed with the Xilinx integrated bit error ratio test (IBERT) tailored for this board for links testing. All intra-board high-speed links between all FPGAs were stable at 10 Gbps, even under the more demanding 31-bit PRBS (Pseudorandom Binary Sequence) tests.

cs.AR↗