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Yufei Ding

Publications and source records attributed to Yufei Ding.

At least 55 records · Page 3Linked to original sources

EdgeOL: Efficient in-situ Online Learning on Edge Devices

Emerging applications, such as robot-assisted eldercare and object recognition, generally employ deep learning neural networks (DNNs) and naturally require: i) handling streaming-in inference requests and ii) adapting to possible deployment scenario changes. Online model fine-tuning is widely adopted to satisfy these needs. However, an inappropriate fine-tuning scheme could involve significant energy consumption, making it challenging to deploy on edge devices. In this paper, we propose EdgeOL, an edge online learning framework that optimizes inference accuracy, fine-tuning execution time, and energy efficiency through both inter-tuning and intra-tuning optimizations. Experimental results show that, on average, EdgeOL reduces overall fine-tuning execution time by 64%, energy consumption by 52%, and improves average inference accuracy by 1.75% over the immediate online learning strategy

cs.LG↗

SPARO: Surface-code Pauli-based Architectural Resource Optimization for Fault-tolerant Quantum Computing

Surface codes represent a leading approach for quantum error correction (QEC), offering a path towards universal fault-tolerant quantum computing (FTQC). However, efficiently implementing algorithms, particularly using Pauli-based computation (PBC) with lattice surgery, necessitates careful resource optimization. Prior work often employs static layouts and simplified error models. These typically fail to capture the full costs and dynamic nature of active computation, leading to resource bottlenecks and suboptimal architectural designs. To address this, we introduce SPARO. SPARO features a comprehensive logical error model based on a large corpus of numerical simulations encompassing active Pauli-based computation (PBC) operations-including Pauli product measurements (PPMs), idling qubits, and patch rotations. Our numerical models are integrated within an end-to-end compilation pipeline. SPARO analyzes algorithm-specific bottlenecks arising from constraints such as limited routing areas or magic-state factory throughput. SPARO then dynamically allocates available hardware resources, balancing compute, routing, and magic-state distillation, to minimize space-time overhead and logical error rates for specific workloads. Our simulations demonstrate that SPARO effectively identifies critical resource trade-offs. When evaluated on benchmark circuits, SPARO identifies resource configurations achieving up to 51.11% logical error rate reductions for 433-qubit ADDER circuits when compared to state-of-the-art static layouts using an identical total resource budget. This dynamic approach enables effective co-optimization of PBC execution and surface-code architectures, significantly improving overall resource efficiency. SPARO will be open sourced.

quant-ph↗

Multi-Target Rydberg Gates via Spatial Blockade Engineering

Multi-target gates offer the potential to reduce gate depth in syndrome extraction for quantum error correction. Although neutral-atom quantum computers have demonstrated native multi-qubit gates, existing approaches that avoid additional control or multiple atomic species have been limited to single-target gates. We propose single-control-multi-target CZ^{\otimes N}) gates on a single-species neutral-atom platform that require no extra control and have gate durations comparable to standard CZ gates. Our approach leverages tailored interatomic distances to create an asymmetric blockade between the control and target atoms. Using a GPU-accelerated pulse synthesis protocol, we design smooth control pulses for CZZ and CZZZ gates, achieving fidelities of up to 99.55% and 99.24%, respectively, even in the presence of simulated atom placement errors and Rydberg-state decay. This work presents a practical path to implementing multi-target gates in neutral-atom systems, significantly reducing the resource overhead for syndrome extraction.

quant-ph↗

TrapSIMD: SIMD-Aware Compiler Optimization for 2D Trapped-Ion Quantum Machines

Modular trapped-ion (TI) architectures offer a scalable quantum computing (QC) platform, with native transport behaviors that closely resemble the Single Instruction Multiple Data (SIMD) paradigm. We present FluxTrap, a SIMD-aware compiler framework that establishes a hardware-software co-design interface for TI systems. FluxTrap introduces a novel abstraction that unifies SIMD-style instructions -- including segmented intra-trap shift SIMD (S3) and global junction transfer SIMD (JT-SIMD) operations -- with a SIMD-enriched architectural graph, capturing key features such as transport synchronization, gate-zone locality, and topological constraints. It applies two passes -- SIMD aggregation and scheduling -- to coordinate grouped ion transport and gate execution within architectural constraints. On NISQ benchmarks, FluxTrap reduces execution time by up to $3.82 \times$ and improves fidelity by several orders of magnitude. It also scales to fault-tolerant workloads under diverse hardware configurations, providing feedback for future TI hardware design.

quant-ph↗

RoboVerse: Towards a Unified Platform, Dataset and Benchmark for Scalable and Generalizable Robot Learning

Data scaling and standardized evaluation benchmarks have driven significant advances in natural language processing and computer vision. However, robotics faces unique challenges in scaling data and establishing evaluation protocols. Collecting real-world data is resource-intensive and inefficient, while benchmarking in real-world scenarios remains highly complex. Synthetic data and simulation offer promising alternatives, yet existing efforts often fall short in data quality, diversity, and benchmark standardization. To address these challenges, we introduce RoboVerse, a comprehensive framework comprising a simulation platform, a synthetic dataset, and unified benchmarks. Our simulation platform supports multiple simulators and robotic embodiments, enabling seamless transitions between different environments. The synthetic dataset, featuring high-fidelity physics and photorealistic rendering, is constructed through multiple approaches. Additionally, we propose unified benchmarks for imitation learning and reinforcement learning, enabling evaluation across different levels of generalization. At the core of the simulation platform is MetaSim, an infrastructure that abstracts diverse simulation environments into a universal interface. It restructures existing simulation environments into a simulator-agnostic configuration system, as well as an API aligning different simulator functionalities, such as launching simulation environments, loading assets with initial states, stepping the physics engine, etc. This abstraction ensures interoperability and extensibility. Comprehensive experiments demonstrate that RoboVerse enhances the performance of imitation learning, reinforcement learning, world model learning, and sim-to-real transfer. These results validate the reliability of our dataset and benchmarks, establishing RoboVerse as a robust solution for advancing robot learning.

cs.RO↗

OnePerc: A Randomness-aware Compiler for Photonic Quantum Computing

The photonic platform holds great promise for quantum computing. Nevertheless, the intrinsic probabilistic characteristics of its native fusion operations introduces substantial randomness into the computing process, posing significant challenges to achieving scalability and efficiency in program execution. In this paper, we introduce a randomness-aware compilation framework designed to concurrently achieve scalability and efficiency. Our approach leverages an innovative combination of offline and online optimization passes, with a novel intermediate representation serving as a crucial bridge between them. Through a comprehensive evaluation, we demonstrate that this framework significantly outperforms the most efficient baseline compiler in a scalable manner, opening up new possibilities for realizing scalable photonic quantum computing.

quant-ph↗

MECH: Multi-Entry Communication Highway for Superconducting Quantum Chiplets

Chiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalability and modularity. However, as the computing scale increases, communication between qubits would become a more severe bottleneck due to the long routing distances. In this paper, we propose a multi-entry communication highway (MECH) mechanism to trade ancillary qubits for program concurrency, and build a compilation framework to efficiently manage and utilize the highway resources. Our evaluation shows that this framework significantly outperforms the baseline approach in both the circuit depth and the number of operations on typical quantum benchmarks. This implies a more efficient and less error-prone compilation of quantum programs.

quant-ph↗

OneAdapt: Adaptive Compilation for Resource-Constrained Photonic One-Way Quantum Computing

Measurement-based quantum computing (MBQC), a.k.a. one-way quantum computing (1WQC), is a universal quantum computing model, which is particularly well-suited for photonic platforms. In this model, computation is driven by measurements on an entangled state, which serves as an intermediate representation (IR) between program and hardware. However, compilers on previous IRs lacks the adaptability to the resource constraint in photonic quantum computers. In this work, we propose a novel IR with new optimization passes. Based on this, it realizes a resource-adaptive compiler that minimizes the required hardware size and execution time while restricting the requirement for fusion devices within an adaptive limit. Moreover, our optimization can be integrated with Quantum Error Correction (QEC) to improve the efficiency of photonic fault-tolerant quantum computing (FTQC).

quant-ph↗

WLB-LLM: Workload-Balanced 4D Parallelism for Large Language Model Training

In this work, we present WLB-LLM, a workLoad-balanced 4D parallelism for large language model training. We first thoroughly analyze the workload imbalance issue in LLM training and identify two primary sources of imbalance at the pipeline parallelism and context parallelism levels. Then, to address the imbalance issue, at the pipeline parallelism level, WLB-LLM incorporates a workload-aware variable-length document packing method to balance the computation and communication workload across micro-batches. Additionally, at the context parallelism level, WLB-LLM introduces a novel fine-grained per-document sharding strategy, ensuring each worker within a context parallelism group has an identical workload. Comprehensive experiments under different model scales demonstrate that WLB-LLM significantly mitigates the workload imbalance during 4D parallelism LLM training and achieves an average speedup of 1.23x when applying WLB-LLM in our internal LLM training framework.

cs.DC↗

Optimizing Quantum Communication for Quantum Data Centers with Reconfigurable Networks

Distributed Quantum Computing (DQC) enables scalability by interconnecting multiple QPUs. Among various DQC implementations, quantum data centers (QDCs), which utilize reconfigurable optical switch networks to link QPUs across different racks, are becoming feasible in the near term. However, the latency of cross-rack communications and dynamic reconfigurations poses unique challenges to quantum communication, significantly increasing the overall latency and exacerbating qubit decoherence. In this paper, we introduce a new optimization space to parallelize cross-rack communications and avoid frequent reconfigurations, which incurs additional in-rack communications that can be further minimized. Based on this, we propose a flexible scheduler that improves communication efficiency while preventing deadlocks and congestion caused by the flexibility. Through a comprehensive evaluation, we show that our approach reduces the overall latency by a factor of 8.02, thereby mitigating qubit decoherence, with a small overhead.

quant-ph↗

SymBreak: Mitigating Quantum Degeneracy Issues in QLDPC Code Decoders by Breaking Symmetry

Quantum error correction (QEC) is critical for scalable and reliable quantum computing, but existing solutions, such as surface codes, incur significant qubit overhead. Quantum low-density parity check (qLDPC) codes have recently emerged as a promising alternative, requiring fewer qubits. However, the lack of efficient decoders remains a major barrier to their practical implementation. In this work, we introduce SymBreak, a novel decoder for qLDPC codes that adaptively modifies the decoding graph to improve the performance of state-of-the-art belief propagation (BP) decoders. Our key contribution is identifying quantum degeneracy as a root cause of the convergence issues often encountered in BP decoding of quantum LDPC codes. We propose a solution that mitigates this issue at the decoding graph level, achieving both fast and accurate decoding. Our results demonstrate that SymBreak outperforms BP and BP+OSD-a more complex variant of BP-with a $16.17\times$ reduction in logical error rate compared to BP and $3.23\times$ compared to BP+OSD across various qLDPC code families. With only an $18.97$% time overhead compared to BP, SymBreak provides significantly faster decoding times than BP+OSD, representing a major advancement in efficient and accurate decoding for qLDPC-based QEC architectures.

quant-ph↗

CaliScalpel: In-Situ and Fine-Grained Qubit Calibration Integrated with Surface Code Quantum Error Correction

Quantum Error Correction (QEC) is a cornerstone of fault-tolerant, large-scale quantum computing. However, qubit error drift significantly degrades QEC performance over time, necessitating periodic calibration. Traditional calibration methods disrupt quantum states, requiring system downtime and making in situ calibration infeasible. We present CaliScalpel, an innovative framework for in situ calibration in surface codes. The core idea behind CaliScalpel is leveraging code deformation to isolate qubits undergoing calibration from logical patches. This allows calibration to proceed concurrently with computation, while code enlargement maintains error correction capabilities with minimal qubit overhead. Additionally, CaliScalpel incorporates optimized calibration schedules derived from detailed device characterization, effectively minimizing physical error rates. Our results show that CaliScalpel achieves concurrent calibration and computation with modest qubit overhead and negligible execution time impact, marking a significant step toward practical in situ calibration in surface-code-based quantum computing systems.

quant-ph↗

Leveraging Hardware Power through Optimal Pulse Profiling for Each Qubit Pair

In the scaling development of quantum computers, the calibration process emerges as a critical challenge. Existing calibration methods, utilizing the same pulse waveform for two-qubit gates across the device, overlook hardware differences among physical qubits and lack efficient parallel calibration. In this paper, we enlarge the pulse candidates for two-qubit gates to three pulse waveforms, and introduce a fine-grained calibration protocol. In the calibration protocol, three policies are proposed to profile each qubit pair with its optimal pulse waveform. Afterwards, calibration subgraphs are introduced to enable parallel calibraton through identifying compatible calibration operations. The protocol is validated on real machine with up to 127 qubits. Real-machine experiments demonstrates a minimum gate error of 0.001 with a median error of 0.006 which is 1.84x reduction compared to default pulse waveform provided by IBM. On device level, a double fold increase in quantum volume as well as 2.3x reduction in error per layered gate are achieved. The proposed protocol leverages the potential current hardware and could server as an important step toward fault-tolerant quantum computing.

quant-ph↗

PowerMove: Optimizing Compilation for Neutral Atom Quantum Computers with Zoned Architecture

Neutral atom-based quantum computers (NAQCs) have recently emerged as promising candidates for scalable quantum computing, largely due to their advanced hardware capabilities, particularly qubit movement and the zoned architecture (ZA). However, fully leveraging these features poses significant compiler challenges, as it requires addressing complexities across gate scheduling, qubit allocation, qubit movement, and inter-zone communication. In this paper, we present PowerMove, an efficient compiler for NAQCs that enhances the qubit movement framework while fully integrating the advantages of ZA. By recognizing and leveraging the interdependencies between these key aspects, PowerMove unlocks new optimization opportunities, significantly enhancing both scalability and fidelity. Our evaluation demonstrates an improvement in fidelity by several orders of magnitude compared to the state-of-the-art methods, with execution time improved by up to 3.46x and compilation time reduced by up to 213.5x. We will open-source our code later to foster further research and collaboration within the community.

quant-ph↗

QECC-Synth: A Layout Synthesizer for Quantum Error Correction Codes on Sparse Hardware Architectures

Quantum Error Correction (QEC) codes are essential for achieving fault-tolerant quantum computing (FTQC). However, their implementation faces significant challenges due to disparity between required dense qubit connectivity and sparse hardware architectures. Current approaches often either underutilize QEC circuit features or focus on manual designs tailored to specific codes and architectures, limiting their capability and generality. In response, we introduce QECC-Synth, an automated compiler for QEC code implementation that addresses these challenges. We leverage the ancilla bridge technique tailored to the requirements of QEC circuits and introduces a systematic classification of its design space flexibilities. We then formalize this problem using the MaxSAT framework to optimize these flexibilities. Evaluation shows that our method significantly outperforms existing methods while demonstrating broader applicability across diverse QEC codes and hardware architectures.

quant-ph↗

Architectures for Heterogeneous Quantum Error Correction Codes

Quantum Error Correction (QEC) is essential for future quantum computers due to its ability to exponentially suppress physical errors. The surface code is a leading error-correcting code candidate because of its local topological structure, experimentally achievable thresholds, and support for universal gate operations with magic states. However, its physical overhead scales quadratically with number of correctable errors. Conversely, quantum low-density parity-check (qLDPC) codes offer superior scaling but lack, on their own, a clear path to universal logical computation. Therefore, it is becoming increasingly evident is becoming that there are significant advantages to designing architectures using multiple codes. Heterogeneous architectures provide a clear path to universal logical computation as well as the ability to access different resource trade offs. To address this, we propose integrating the surface code and gross code using an ancilla bus for inter-code data movement. This approach involves managing trade-offs, including qubit overhead, a constrained instruction set, and gross code (memory) routing and management. While our focus is on the gross-surface code architecture, our method is adaptable to any code combination and the constraints generated by that specific architecture. Motivated by the potential reduction of physical qubit overhead, an ever important feature in the realization of fault tolerant computation, we perform the first full system study of heterogeneous error-correcting codes, discovering architectural trade-offs and optimizing around them. We demonstrate physical qubit reductions of up to 6.42x when executing an algorithm to a specific logical error rate, at the cost of up to a 3.43x increase in execution time.

quant-ph↗

DexGraspNet 2.0: Learning Generative Dexterous Grasping in Large-scale Synthetic Cluttered Scenes

Grasping in cluttered scenes remains highly challenging for dexterous hands due to the scarcity of data. To address this problem, we present a large-scale synthetic benchmark, encompassing 1319 objects, 8270 scenes, and 427 million grasps. Beyond benchmarking, we also propose a novel two-stage grasping method that learns efficiently from data by using a diffusion model that conditions on local geometry. Our proposed generative method outperforms all baselines in simulation experiments. Furthermore, with the aid of test-time-depth restoration, our method demonstrates zero-shot sim-to-real transfer, attaining 90.7% real-world dexterous grasping success rate in cluttered scenes.

cs.RO↗

S-QGPU: Shared Quantum Gate Processing Unit for Distributed Quantum Computing

We propose a distributed quantum computing (DQC) architecture in which individual small-sized quantum computers are connected to a shared quantum gate processing unit (S-QGPU). The S-QGPU comprises a collection of hybrid two-qubit gate modules for remote gate operations. In contrast to conventional DQC systems, where each quantum computer is equipped with dedicated communication qubits, S-QGPU effectively pools the resources (e.g., the communication qubits) together for remote gate operations, and thus significantly reduces the cost of not only the local quantum computers but also the overall distributed system. Our preliminary analysis and simulation show that S-QGPU's shared resources for remote gate operations enable efficient resource utilization. When not all computing qubits (also called data qubits) in the system require simultaneous remote gate operations, S-QGPU-based DQC architecture demands fewer communication qubits, further decreasing the overall cost. Alternatively, with the same number of communication qubits, it can support a larger number of simultaneous remote gate operations more efficiently, especially when these operations occur in a burst mode.

quant-ph↗