arXiv subjects

Yungyeong Park

Publications and source records attributed to Yungyeong Park.

3 recordsLinked to original sources

arXiv2026

Designing Extremely Low-Power Topological Transistors with 1T'-MoS2 and HZO for Cryogenic Applications

Large-scale quantum computing requires cryogenic electronic controllers such as control/readout circuit and routing circuit. However, current technologies face high power dissipation problems, hindering large-scale qubit integration. Here, we theoretically propose extremely low-power cryogenic topological transistors, i.e., negative-capacitance topological insulator field-effect transistors (NC-TIFETs). By combining a gate-field-induced two-dimensional 1T'-Molybdenum Disulfide (MoS$_2$) topological channel with a hafnium-zirconium oxide (HZO) ferroelectric gate insulator, NC-TIFETs exhibit an extremely steep-slope transfer curve and ultra-high transconductance at low drain voltage ($V_{\mathrm{D}}$). Therefore, NC-TIFETs are the compelling candidate for minimizing power dissipation in the cryogenic electronic interfaces essential for large-scale quantum computing systems.

cond-mat.mes-hall↗

arXiv2026

Trap-Enhanced Steep-Slope Negative-Capacitance FETs Using Amorphous Oxide Semiconductors

Amorphous oxide semiconductors (AOSs) have recently gained attention as a promising channel material of back-end-of-line (BEOL)-compatible transistors for monolithic three-dimensional (3D) integrations. However, the degradation in device performance resulting from the high trap densities in AOS, compared to conventional crystalline channel materials, has remained an intractable issue. We introduce the negative-capacitance (NC) operation into the AOS-based transistors. Negative-capacitance field-effect transistors (NCFETs) have been proposed for low-power devices, enabling sub-60 mV/decade subthreshold swing SS induced by a ferroelectric layer. In this work, we develop an AOS NCFET model to investigate the influence of traps within the channel on the steep-slope operation. It is revealed that as the trap density of the channel increases, SS of the MOSFET increases, while the SS of the NCFET decreases. The physical interpretation for steep SS is attributed to the fact that the trapped charges enhance the negative potential drop of the NC layer, enabling the abrupt device switching. This finding will accelerate the development of BEOL transistors and other applications based on the AOS materials in conjunction with the NC effect.

cond-mat.other↗

arXiv2026

Tight-Binding Device Modeling of 2-D Topological Insulator Field-Effect Transistors With Gate-Induced Phase Transition

Topological insulator field-effect transistors (TIFETs) built on 2-D quantum spin Hall insulators are being considered as advanced logic transistors due to their potentially superior performance originating from the dissipationless edge transport. This paper presents a device modeling based on the tight-binding model and the nonequilibrium Green's function formalism to simulate the current-voltage characteristics of the TIFETs. We then use the device simulator to demonstrate the effect of channel length on device performance. The device modeling will not only enable a direct estimation of TIFET performance but also shed light on the nontraditional switching operation via the topological phase transition.

cond-mat.mes-hall↗