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Zachary Stegen

Publications and source records attributed to Zachary Stegen.

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Demonstration of a scalable all-solid-state refrigerator exploiting diffusion geometries and limiting interfacial conductances at temperatures below 1 kelvin

Solid-state refrigerators using Normal-metal/Insulator/Superconductor (NIS) junctions have previously demonstrated excellent electron cooling but limited ability to cool phonons. The energy gap of the superconductor is used as an energy filter to allow higher than average energy electrons to preferentially tunnel from the normal-metal through the insulator into the superconductor where they travel as quasi-particles. Typically, the heat is moved and work is done to deposit hot quasi-particles into a normal-metal quasi-particle trap for rejection to the next refrigeration stage. Realizing that (1) the quasi-particles flow diffusively, driven by a concentration gradient in the electric field-free superconductor, and (2) that the undesirable backwards leaking of heat from the hot-side trap can be reduced by engineering the geometry and materials at the superconductor-to-trap interface, enhanced cooling can be achieved. Fabrication of the refrigerator was accomplished using a tungsten and titanium-tungsten alloy as the cold-side normal-metal, aluminum oxide as the insulator, aluminum as the superconductor, and gold as the trap, with the cold-side NIS portion being attached to the hot-side gold trap by bump bonding. The refrigerator consisted of 1121 junction pairs, each pair being an SINIS unit, all electrically connected in series. Using this we have measured the effective phonon temperature of a 3.9 mm x 3.9 mm x 0.65 mm silicon chip driven down to 70 mK from a bath temperature of 120 mK, and down to 174 mK from a 271 mK rejection temperature (a cooling of -97 mK). This is the first demonstration of the sub 1 K cooling of an entire silicon chip using NIS junctions.

cond-mat.supr-con

Transmon Phase Gates Controlled by Superconducting Soliton DAC

We introduce a superconducting digital-to-analog converter (DAC) that filters control noise, provides native multiplexing, performs quantum gates in nanoseconds, and can be controlled by CMOS. This is achieved by transducing a trapezoidal drive pulse into a superconducting soliton, which is then held in the DAC load loop, applying flux to a mutually-coupled superconducting qubit or gate coupler. The analog flux output by the DAC can be easily controlled by varying the soliton hold time, or with a DC-biased tunable DAC-qubit coupler, allowing the DAC to perform a fixed-time, high-fidelity gate that's robust to fabrication variance or flux offsets in the quantum circuit. Our initial demonstration shows that the DAC can successfully perform 5.6 ns S-gates on transmons. We measure the DAC-induced quantum state excitation probability per gate to be 0.05%, and find that the DAC-induced relaxation rate from the qubit 1 state is below the intrinsic T1 rate limit of the transmon. Quantum simulations show qualitative agreement with the measured data, and predict that the DAC excitation rate can be lowered 10 times further by overdamping the Josephson junction (JJ) in the DAC load loop. may be limited by a Interleaved Randomized Benchmarking (IRB) sequences on an observer qubit reveal that, when scaling to many qubits, the DAC's performance may be limited by a non-local, DAC-induced phase error of 1.6% per gate, appearing in ancilla qubits that are not directly coupled to any of the 30 DACs on the chip. We discuss strategies for future layouts of multi-DAC chips that focus on mitigating the source of these non-local, high-frequency electromagnetic interactions (EMI), and how to incorporate a DC-tunable coupler for phase correction.

quant-ph