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arXiv · 0811.4540

Monolithic Pixel Sensors in Deep-Submicron SOI Technology with Analog and Digital Pixels

Marco Battaglia·Dario Bisello·Devis Contarato·Peter Denes·Piero Giubilato·Lindsay Glesener·Serena Mattiazzo·Chinh Vu
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Abstract

This paper presents the design and test results of a prototype monolithic pixel sensor manufactured in deep-submicron fully-depleted Silicon-On-Insulator (SOI) CMOS technology. In the SOI technology, a thin layer of integrated electronics is insulated from a (high-resistivity) silicon substrate by a buried oxide. Vias etched through the oxide allow to contact the substrate from the electronics layer, so that pixel implants can be created and a reverse bias can be applied. The prototype chip, manufactured in OKI 0.15 micron SOI process, features both analog and digital pixels on a 10 micron pitch. Results of tests performed with infrared laser and 1.35 GeV electrons and a first assessment of the effect of ionising and non-ionising doses are discussed.

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Marco Battaglia, Dario Bisello, Devis Contarato, Peter Denes, Piero Giubilato, Lindsay Glesener, Serena Mattiazzo, Chinh Vu. 2008-11-27. Monolithic Pixel Sensors in Deep-Submicron SOI Technology with Analog and Digital Pixels. https://doi.org/10.1016/j.nima.2009.01.178

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