Transistor Switches using Active Piezoelectric Gate Barriers

Raj K. Jana; Arvind Ajoy; Gregory Snider; Debdeep Jena

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arXiv · 1505.00378

Transistor Switches using Active Piezoelectric Gate Barriers

Raj K. Jana·Arvind Ajoy·Gregory Snider·Debdeep Jena

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Abstract

This work explores the consequences of introducing a piezoelectric gate barrier in a normal field-effect transistor. Because of the positive feedback of strain and piezoelectric charge, internal charge amplification occurs in such an electromechanical capacitor resulting in a negative capacitance. The first consequence of this amplification is a boost in the on-current of the transistor. As a second consequence, employing the Lagrangian method, we find that by using the negative capacitance of a highly compliant piezoelectric barrier, one can potentially reduce the subthreshold slope of a transistor below the room temperature Boltzmann limit of 60 mV/decade. However, this may come at the cost of hysteretic behavior in the transfer characteristics.

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Raj K. Jana, Arvind Ajoy, Gregory Snider, Debdeep Jena. 2015-05-02. Transistor Switches using Active Piezoelectric Gate Barriers. https://arxiv.org/abs/1505.00378

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