Device-aware inference operations in SONOS nonvolatile memory arrays

Christopher H. Bennett; T. Patrick Xiao; Ryan Dellana; Vineet Agrawal; Ben Feinberg; Venkatraman Prabhakar; Krishnaswamy Ramkumar; Long Hinh; Swatilekha Saha; Vijay Raghavan; Ramesh Chettuvetty; Sapan Agarwal; Matthew J. Marinella

arXiv · 2004.00802

Device-aware inference operations in SONOS nonvolatile memory arrays

Christopher H. Bennett·T. Patrick Xiao·Ryan Dellana·Vineet Agrawal·Ben Feinberg·Venkatraman Prabhakar·Krishnaswamy Ramkumar·Long Hinh·Swatilekha Saha·Vijay Raghavan·Ramesh Chettuvetty·Sapan Agarwal·Matthew J. Marinella

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Abstract

Non-volatile memory arrays can deploy pre-trained neural network models for edge inference. However, these systems are affected by device-level noise and retention issues. Here, we examine damage caused by these effects, introduce a mitigation strategy, and demonstrate its use in fabricated array of SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) devices. On MNIST, fashion-MNIST, and CIFAR-10 tasks, our approach increases resilience to synaptic noise and drift. We also show strong performance can be realized with ADCs of 5-8 bits precision.

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Christopher H. Bennett, T. Patrick Xiao, Ryan Dellana, Vineet Agrawal, Ben Feinberg, Venkatraman Prabhakar, Krishnaswamy Ramkumar, Long Hinh, Swatilekha Saha, Vijay Raghavan, Ramesh Chettuvetty, Sapan Agarwal, Matthew J. Marinella. 2020-04-02. Device-aware inference operations in SONOS nonvolatile memory arrays. https://arxiv.org/abs/2004.00802

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