High-Yield, Scaling-Up Fabrication of Fermi-Level-Pinning-Free Organic Thin-Film Transistor Arrays with Printed Van der Waals Contacts

Abstract

Fermi-level pinning (FLP) effect was widely observed in thin-film transistors (TFTs) with van der Waals (vdW) layered semiconductors (organic or two-dimensional) when contact electrodes were thermally evaporated1-3. Intensive investigation was implemented for formation of FLP-free interfacial states by eliminating chemical disorder and crystal defects arising from metal deposition4-9. However, technical and principal challenges are still existing towards high-yield, wafer-scalable and low-cost integration of TFT devices. Herein, we developed a general, scaling-up strategy to fabricate large-scale, high-performance FLP-free organic TFT (OTFT) arrays by using printed vdW contacts consisting of MXene composite electrodes and 2, 7-dioctyl [1] benzothieno [3, 2-b] [1] benzothiophene (C8BTBT). Room-temperature processes allow for a physically stacked junction without any structural or chemical damages. The OTFT arrays can be printed on a large-area silicon wafer or plastic film with 100% yield, exhibit ultrahigh field-effect mobility ({\mu}_FE) over 17.0 square centimetres per volt per second (cm2 V-1s-1), high on/off ratio exceeding 108, relatively low contact resistance of 3k ohm micrometres. The underlying mechanism for the high device performance was unveiled by Kelvin Probe Force Microscopy (KPFM) combined with theoretical simulation. The results indicate that work function (W_F) of the printed electrodes can be tuned at a wide range of 4.8-5.6 eV, thus significantly lowering the charge-injection barrier at the contact interfaces with ideal FLP-free character (the interfacial factor reaches 0.99 \pm 0.02). This study paves a general strategy for achieving large-scale, high-performance thin-film electronics.