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arXiv · 2510.02762

Development of Deep Neural Network First-Level Hardware Track Trigger for the Belle II Experiment

Abstract

The Belle II experiment at the SuperKEKB accelerator is designed to explore physics beyond the Standard Model with unprecedented luminosity. As the beam intensity increased, the experiment faced significant challenges due to higher beam-induced background, leading to a high trigger rate and placing limitations on further luminosity increases. To address this problem, we developed trigger logic for tracking using deep neural network (DNN) technology on an FPGA for the Belle II hardware trigger system, employing high-level synthesis techniques. By leveraging drift time and hit pattern information from the Central Drift Chamber and incorporating a simplified self-attention architecture, the DNN track trigger significantly improves track reconstruction performance at the hardware level. Compared to the existing neural track trigger, our implementation reduces the total track trigger rate by 37% while improving average efficiency for the signal tracks from 96% to 98% for charged tracks with transverse momentum > 0.3 GeV. This upgrade ensures the long-term viability of the Belle II data acquisition system as luminosity continues to increase.

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Y. -X. Liu, T. Koga, H. Bae, Y. Yang, C. Kiesling, F. Meggendorfer, K. Unger, S. Hiesl, T. Forsthofer, A. Ishikawa, Y. Ahn, T. Ferber, I. Haide, G. Heine, C. -L. Hsu, A. Little, H. Nakazawa, M. Neu, L. Reuter, V. Savinov, Y. Unno, J. Yuan, Z. Xu. 2025-10-03. Development of Deep Neural Network First-Level Hardware Track Trigger for the Belle II Experiment. https://arxiv.org/abs/2510.02762

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