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arXiv · 2602.01422

PCIe400 generic readout board qualification test

Kevin Arnaud·Antoine Back·Daniel Charlet·Gabriel Degret·Luigi Del Buono·Paolo Durante·Amaury Hervo·Frédéric Hachon·Xavier Lafay·Julien Langouët·Renaud Le Gac·Jea-Luc Meunier·Jean-Marc Nappa·Costy Nassif Mattar·Christophe Renard·Guillaume Vouters
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Abstract

The PCIe400 is a generic readout board designed for high-throughput data acquisition in future high-energy physics experiments. It interfaces up to 48 bidirectional links supporting custom protocols from 1 to 26 Gbps to modern back-end systems providing up to 400 Gbps bandwidth.The board is developed as a technological demonstrator for the LHCb Upgrade II, which foresees an aggregated throughput of approximately 200 Tbps. In addition to increased bandwidth, the PCIe400 targets deterministic clock distribution to front-end electronics. At a maximum instantaneous luminosity of $1.5~\times~10^{34}~cm^{-2}s^{-1}$, up to 40 proton-proton interactions per bunch crossing are expected in LHCb Upgrade II. The adoption of 4D tracking detectors with time resolutions down to 20 ps motivates clock distribution with phase determinism below 10 ps peak-to-peak across large-scale systems exceeding 2000 nodes. This paper presents the qualification of the PCIe400 prototype board, focusing on high-bandwidth interfaces, including next-generation QSFP112 links, and phase-deterministic clock distribution.

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Kevin Arnaud, Antoine Back, Daniel Charlet, Gabriel Degret, Luigi Del Buono, Paolo Durante, Amaury Hervo, Frédéric Hachon, Xavier Lafay, Julien Langouët, Renaud Le Gac, Jea-Luc Meunier, Jean-Marc Nappa, Costy Nassif Mattar, Christophe Renard, Guillaume Vouters. 2026-02-01. PCIe400 generic readout board qualification test. https://arxiv.org/abs/2602.01422

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