Seed Layer Engineering for Effective Charge Transfer Doping of MoS$_2$ Transistors

Abstract

Integrating two-dimensional semiconductors such as MoS$_2$ with dielectric materials remains a central challenge for their use in future logic technologies. While seed layers are typically introduced to promote dielectric nucleation and adhesion, we show that they also critically govern charge-transfer doping and, in turn, transistor performance. Back-gated monolayer MoS$_2$ transistors passivated on their top-surface with a Ta-seed/HfO$_x$ dielectric stack were fabricated and characterized electrically and physically using Raman, photoluminescence, and X-ray photoelectron spectroscopies. Threshold voltage and on-current varied strongly with Ta-seed thickness and deposition conditions, and these changes correlated with signatures observed across all spectroscopic probes. The results reveal that the seed layer both introduces disorder into the MoS$_2$ channel and modifies the interfacial charge environment controlling charge transfer between HfO$_x$ and MoS$_2$. Optical spectroscopy shows that on-current tracks seed-induced disorder, whereas X-ray photoelectron spectroscopy indicates that threshold voltage correlates with shifts in the local electrostatic environment associated with interfacial charge transfer. Better performance was obtained with ultrathin 0.2 nm Ta seed layers deposited under oxygen-poor conditions, which limit deposition-induced damage while facilitating charge transfer. These findings identify seed-layer engineering as a key strategy for controlling disorder and interfacial doping in MoS$_2$ devices and establish multimodal spectroscopy as a practical during-fabrication approach for process development and monitoring.