arXiv subjects

A. Crippa

Publications and source records attributed to A. Crippa.

8 recordsLinked to original sources

arXiv2019

Gate reflectometry for probing charge and spin states in linear Si MOS split-gate arrays

We fabricated linear arrangements of multiple splitgate devices along an SOI mesa, thus forming a 2xN array of individually controllable Si quantum dots (QDs) with nearest neighbor coupling. We implemented two different gate reflectometry-based readout schemes to either probe spindependent charge movements by a coupled electrometer with single-shot precision, or directly sense a spin-dependent quantum capacitance. These results bear significance for fast, high-fidelity single-shot readout of large arrays of foundrycompatible Si MOS spin qubits.

cond-mat.mes-hall↗

arXiv2019

Towards scalable silicon quantum computing

We report the efforts and challenges dedicated towards building a scalable quantum computer based on Si spin qubits. We review the advantages of relying on devices fabricated in a thin film technology as their properties can be in situ tuned by the back gate voltage, which prefigures tuning capabilities in scalable qubits architectures.

cond-mat.mes-hall↗

arXiv2019

All-Electrical Control of a Hybrid Electron Spin/Valley Quantum Bit in SOI CMOS Technology

We successfully demonstrated experimentally the electrical-field-mediated control of the spin of electrons confined in an SOI Quantum Dot (QD) device fabricated with a standard CMOS process flow. Furthermore, we show that the Back-Gate control in SOI devices enables switching a quantum bit (qubit) between an electrically-addressable, yet charge noise-sensitive configuration, and a protected configuration.

cond-mat.mes-hall↗

arXiv2019

Control of single spin in CMOS devices and its application for quantum bits

We show how to measure and manipulate a single spin in a CMOS device fabricated in a pre-industrial 300 mm CMOS foundry. The device can be used as a spin quantum bit working at very low temperature. The spin manipulation is done by a microwave electric field applied directly on a gate. The presented results are a proof-of-principle demonstration of the possibility to define qubits by means of conventional industrial fabrication processes.

cond-mat.mes-hall↗

arXiv2019

Gate-reflectometry dispersive readout and coherent control of a spin qubit in silicon

Silicon spin qubits have emerged as a promising path to large-scale quantum processors. In this prospect, the development of scalable qubit readout schemes involving a minimal device overhead is a compelling step. Here we report the implementation of gate-coupled rf reflectometry for the dispersive readout of a fully functional spin qubit device. We use a p-type double-gate transistor made using industry-standard silicon technology. The first gate confines a hole quantum dot encoding the spin qubit, the second one a helper dot enabling readout. The qubit state is measured through the phase response of a lumped-element resonator to spin-selective interdot tunneling. The demonstrated qubit readout scheme requires no coupling to a Fermi reservoir, thereby offering a compact and potentially scalable solution whose operation may be extended above 1\,K.

cond-mat.mes-hall↗

arXiv2019

Cryogenic characterization of 28nm FD-SOI ring oscillators with energy efficiency optimization

Extensive electrical characterization of ring oscillators (ROs) made in high-$κ$ metal gate 28nm Fully-Depleted Silicon-on- Insulator (FD-SOI) technology is presented for a set of temperatures between 296 and 4.3K. First, delay per stage ($τ_P$), static current ($I_{STAT}$), and dynamic current ($I_{DYN}$) are analyzed for the case of the increase of threshold voltage ($V_{TH}$) observed at low temperature. Then, the same analysis is performed by compensating $V_{TH}$ to a constant, temperature independent value through forward body-biasing (FBB). Energy efficiency optimization is proposed for different supply voltages ($V_{DD}$) in order to find an optimal operating point combining both high RO frequencies and low power dissipation. We show that the Energy-Delay product ($EDP$) can be significantly reduced at low temperature by applying a forward body bias voltage ($V_{FBB}$). We demonstrate that outstanding performance of RO in terms of speed ($τ_P$=37ps) and static power (7nA/stage) can be achieved at 4.3K with $V_{DD}$ reduced down to 0.325V.

physics.app-ph↗

arXiv2017

Pauli spin blockade in CMOS double quantum dot devices

Silicon quantum dots are attractive candidates for the development of scalable, spin-based qubits. Pauli spin blockade in double quantum dots provides an efficient, temperature independent mechanism for qubit readout. Here we report on transport experiments in double gate nanowire transistors issued from a CMOS process on 300 mm silicon-on-insulator wafers. At low temperature the devices behave as two few-electron quantum dots in series. We observe signatures of Pauli spin blockade with a singlet-triplet splitting ranging from 0.3 to 1.3 meV. Magneto-transport measurements show that transitions which conserve spin are shown to be magnetic-field independent up to B = 6 T.

cond-mat.mes-hall↗

arXiv2015

Valley blockade and multielectron spin-valley Kondo effect in silicon

We report on the valley blockade and the multielectron Kondo effect generated by an impurity atom in a silicon nano field effect device. According to the spin-valley nature of tunnelling processes, and consistently with those allowed by the valley blockade regime, the manifestation of Kondo effect obeys to the periodicity 4 of the electron filling sequence typical of silicon emerging at occupation N=1, 2, 3. The spin-valley Kondo effect emerges under different kinds of screening depending on the electron filling. By exploiting the valley blockade regime, valley index conservation in the Kondo SU(4) is deduced without the employment of an external magnetic field. Microwave irradiation suppresses the Kondo effect at occupancies up to three electrons.

cond-mat.mes-hall↗