arXiv subjects

D. J. Reilly

Publications and source records attributed to D. J. Reilly.

At least 19 recordsLinked to original sources

arXiv2023

An rf Quantum Capacitance Parametric Amplifier

We demonstrate a radio-frequency parametric amplifier that exploits the gate-tunable quantum capacitance of an ultra high mobility two dimensional electron gas (2DEG) in a GaAs heterostructure at cryogenic temperatures. The prototype narrowband amplifier exhibits a gain greater than 20 dB up to an input power of - 66 dBm (1 dB compression), and a noise temperature TN of 1.3 K at 370 MHz. In contrast to superconducting amplifiers, the quantum capacitance parametric amplifier (QCPA) is operable at tesla-scale magnetic fields and temperatures ranging from milli kelvin to a few kelvin. These attributes, together with its low power (microwatt) operation when compared to conventional transistor amplifiers, suggest the QCPA may find utility in enabling on-chip integrated readout circuits for semiconductor qubits or in the context of space transceivers and radio astronomy instruments.

cond-mat.mes-hall↗

arXiv2022

Local and Non-local Microwave Impedance of a Three-Terminal Hybrid Device

We report microwave impedance measurements of a superconductor-semiconductor hybrid nanowire device with three terminals (3T). Our technique makes use of transmission line resonators to acquire the nine complex scattering matrix parameters (S-parameters) of the device on fast timescales and across a spectrum of frequencies spanning 0.3 - 7 GHz. Via comparison with dc-transport measurements, we examine the utility of this technique for probing the local and non-local response of 3T devices where capacitive and inductive contributions can play a role. Such measurements require careful interpretation but may be of use in discerning true Majorana zero modes from trivial states arising from disorder.

cond-mat.mes-hall↗

arXiv2021

Spin-Relaxation Mechanisms in InAs Quantum Well Heterostructures

The spin-orbit interaction and spin-relaxation mechanisms of a shallow InAs quantum well heterostructure are investigated by magnetoconductance measurements as a function of an applied top-gate voltage. The data were fit using the Iordanskii--Lyanda-Geller--Pikus model and two distinct transport regimes were identified which correspond to the first and second sub-bands of the quantum well. The spin-orbit interaction splitting energy is extracted from the fits to the data, which also displays two distinct regimes. The different sub-band regimes exhibit different spin-scattering mechanisms, the identification of which, is of relevance for device platforms of reduced dimensionality which utilise the spin-orbit interaction.

cond-mat.mes-hall↗

arXiv2021

Spin-orbit Energies in Etch-Confined Superconductor-Semiconductor Nanowires

We report magneto-transport measurements of quasi-1-dimensional (1D) Al-InAs nanowires produced via etching of a hybrid superconductor-semiconductor two-dimensional electron gas (2DEG). Tunnel spectroscopy measurements above the superconducting gap provide a means of identifying the 1D sub-bands associated with the confined 1D region. Fitting the data to a model that includes the different components of the spin-orbit interaction (SOI) reveals their strength, of interest for evaluating the suitability of superconductor-semiconductor 2DEG for realizing Majorana qubits.

cond-mat.mes-hall↗

arXiv2021

Josephson Junctions Via Anodization of Epitaxial Al on an InAs Heterostructure

We combine electron beam lithography and masked anodization of epitaxial aluminium to define tunnel junctions via selective oxidation, alleviating the need for wet-etch processing or direct deposition of dielectric materials. Applying this technique to define Josephson junctions in proximity induced superconducting Al-InAs heterostructures, we observe multiple Andreev reflections in transport experiments, indicative of a high quality junction. We further compare the mobility and density of Hall-bars defined via wet etching and anodization. These results may find utility in uncovering new fabrication approaches to junction-based qubit platforms.

cond-mat.supr-con↗

arXiv2019

Challenges in Scaling-up the Control Interface of a Quantum Computer

Challenges at the quantum-classical interface are examined with the goal of architecting a scaled-up quantum computer comprising many thousands of qubits in the solid-state. Separating the distinct sub-systems of the interface that perform readout and control, general arguments are given for why distributing the components of these sub-systems over significant distances and across large temperature gradients presents a major challenge to scaling-up the technology. Largely addressing these issues, an architecture for the interface that leverages cryo-CMOS circuits proximal to the quantum plane is motivated in addition to protocols that enable massively parallel readout of qubits via frequency multiplexing.

quant-ph↗

arXiv2019

A Cryogenic Interface for Controlling Many Qubits

A scaled-up quantum computer will require a highly efficient control interface that autonomously manipulates and reads out large numbers of qubits, which for solid-state implementations are usually held at millikelvin (mK) temperatures. Advanced CMOS technology, tightly integrated with the quantum system, would be ideal for implementing such a control interface but is generally discounted on the basis of its power dissipation that leads to heating of the fragile qubits. Here, we demonstrate an ultra low power, CMOS-based quantum control platform that takes digital commands as input and generates many parallel qubit control signals. Realized using 100,000 transistors operating near 100 mK, our platform alleviates the need for separate control lines to every qubit by exploiting the low leakage of transistors at cryogenic temperatures to store charge on floating gate structures that are used to tune-up quantum devices. This charge can then be rapidly shuffled between on-chip capacitors to generate the fast voltage pulses required for dynamic qubit control. We benchmark this architecture on a quantum dot test device, showing that the control of thousands of gate electrodes is feasible within the cooling power of commercially available dilution refrigerators.

quant-ph↗

arXiv2019

Tailored nanodiamonds for hyperpolarized 13C MRI

Nanodiamond is poised to become an attractive material for hyperpolarized 13C MRI if large nuclear polarizations can be achieved without the accompanying rapid spin-relaxation driven by paramagnetic species. Here we report enhanced and long-lived 13C polarization in synthetic nanodiamonds tailored by acid-cleaning and air-oxidation protocols. Our results separate the contributions of different paramagnetic species on the polarization behavior, identifying the importance of substitutional nitrogen defect centers in the nanodiamond core. These results are likely of use in the development of nanodiamond-based imaging agents with size distributions of relevance for examining biological processes.

cond-mat.mes-hall↗

arXiv2019

Repairing the Surface of InAs-based Topological Heterostructures

Candidate systems for topologically-protected qubits include two-dimensional electron gases (2DEGs) based on heterostructures exhibiting a strong spin-orbit interaction (SOI) and superconductivity via the proximity effect. For InAs- or InSb-based materials, the need to form shallow quantum wells to create a hard-gapped $p$-wave superconducting state often subjects them to fabrication-induced damage, limiting their mobility. Here we examine scattering mechanisms in processed InAs 2DEG quantum wells and demonstrate a means of increasing their mobility via repairing the semiconductor-dielectric interface. Passivation of charged impurity states with an argon-hydrogen plasma results in a significant increase in the measured mobility and reduction in its variance relative to untreated samples, up to 45300 cm$^2$/(V s) in a 10 nm deep quantum well.

cond-mat.mes-hall↗

arXiv2019

Characterising Quantum Devices at Scale with Custom Cryo-CMOS

We make use of a custom-designed cryo-CMOS multiplexer (MUX) to enable multiple quantum devices to be characterized in a single cool-down of a dilution refrigerator. Combined with a packaging approach that integrates cryo-CMOS chips and a hot-swappable, parallel device test platform, we describe how this setup takes a standard wiring configuration as input and expands the capability for batch-characterization of quantum devices at milli-Kelvin temperatures and high magnetic fields. The architecture of the cryo-CMOS multiplexer is discussed and performance benchmarked using few-electron quantum dots and Hall mobility-mapping measurements.

physics.app-ph↗

arXiv2019

Dispersive Gate Sensing the Quantum Capacitance of a Point Contact

The technique of dispersive gate sensing (DGS) uses a single electrode to readout a qubit by detecting the change in quantum capacitance due to single electron tunnelling. Here, we extend DGS from the detection of discrete tunnel events to the open regime, where many electrons are transported via partially- or fully-transmitting quantum modes. Comparing DGS with conventional transport shows that the technique can resolve the Van Hove singularities of a one-dimensional ballistic system, and also probe aspects of the potential landscape that are not easily accessed with dc transport. Beyond readout, these results suggest that gate-sensing can also be of use in tuning-up qubits or probing the charge configuration of open quantum devices in the regime where electrons are delocalized.

cond-mat.mes-hall↗

arXiv2018

Gate-based single-shot readout of spins in silicon

Electron spins in silicon quantum dots provide a promising route towards realising the large number of coupled qubits required for a useful quantum processor. At present, the requisite single-shot spin qubit measurements are performed using on-chip charge sensors, capacitively coupled to the quantum dots. However, as the number of qubits is increased, this approach becomes impractical due to the footprint and complexity of the charge sensors, combined with the required proximity to the quantum dots. Alternatively, the spin state can be measured directly by detecting the complex impedance of spin-dependent electron tunnelling between quantum dots. This can be achieved using radio-frequency reflectometry on a single gate electrode defining the quantum dot itself, significantly reducing gate count and architectural complexity, but thus far it has not been possible to achieve single-shot spin readout using this technique. Here, we detect single electron tunnelling in a double quantum dot and demonstrate that gate-based sensing can be used to read out the electron spin state in a single shot, with an average readout fidelity of 73%. The result demonstrates a key step towards the readout of many spin qubits in parallel, using a compact gate design that will be needed for a large-scale semiconductor quantum processor.

quant-ph↗

arXiv2017

Device Architecture for Coupling Spin Qubits Via an Intermediate Quantum State

We demonstrate a scalable device architecture that facilitates indirect exchange between singlet-triplet spin qubits, mediated by an intermediate quantum state. The device comprises five quantum dots, which can be independently loaded and unloaded via tunneling to adjacent reservoirs, avoiding charge latch-up common in linear dot arrays. In a step towards realizing two-qubit entanglement based on indirect exchange, the architecture permits precise control over tunnel rates between the singlet-triplet qubits and the intermediate state. We show that by separating qubits by 1 um, the residual capacitive coupling between them is reduced to 7 ueV.

cond-mat.mes-hall↗

arXiv2017

Gate-Sensing Charge Pockets in the Semiconductor Qubit Environment

We report the use of dispersive gate sensing (DGS) as a means of probing the charge environment of heterostructure-based qubit devices. The DGS technique, which detects small shifts in the quantum capacitance associated with single-electron tunnel events, is shown to be sensitive to pockets of charge in the potential-landscape likely under, and surrounding, the surface gates that define qubits and their readout sensors. Configuring a quantum point contact (QPC) as a localized emitter, we show how these charge pockets are activated by the relaxation of electrons tunneling through a barrier. The presence of charge pockets creates uncontrolled offsets in gate-bias and their thermal activation by on-chip tunnel currents suggests further sources of charge-noise that lead to decoherence in semiconductor qubits.

cond-mat.mes-hall↗

arXiv2017

Zero-field Edge Magnetoplasmons in a Magnetic Topological Insulator

Incorporating ferromagnetic dopants, such as chromium or vanadium, into thin films of the three-dimensional (3D) topological insulator (TI) (Bi,Sb)2Te3 has recently led to the realisation of the quantum anomalous Hall effect (QAHE), a unique phase of quantum matter. These materials are of great interest, since they may support electrical currents that flow without resistance via edge channels, even at zero magnetic field. To date, the QAHE has been investigated using low-frequency transport measurements. However, transport requires contacting the sample and results can be difficult to interpret due to the presence of parallel conductive paths, via either the bulk or surface, or because additional non-chiral edge channels may exist. Here, we move beyond transport measurements by probing the microwave response of a magnetised disk of Cr-(Bi,Sb)2Te3. We identify features associated with chiral edge magnetoplasmons (EMPs), a signature that robust edge-channels are indeed intrinsic to this material system. Our results provide a measure of the velocity of edge excitations without contacting the sample, and pave the way for a new, on-chip circuit element of practical importance: the TI, zero-field microwave circulator.

cond-mat.mes-hall↗

arXiv2016

Interfacing spin qubits in quantum dots and donors - hot, dense and coherent

Semiconductor spins are one of the few qubit realizations that remain a serious candidate for the implementation of large-scale quantum circuits. Excellent scalability is often argued for spin qubits defined by lithography and controlled via electrical signals, based on the success of conventional semiconductor integrated circuits. However, the wiring and interconnect requirements for quantum circuits are completely different from those for classical circuits, as individual DC, pulsed and in some cases microwave control signals need to be routed from external sources to every qubit. This is further complicated by the requirement that these spin qubits currently operate at temperatures below 100 mK. Here we review several strategies that are considered to address this crucial challenge in scaling quantum circuits based on electron spin qubits. Key assets of spin qubits include the potential to operate at 1 to 4 K, the high density of quantum dots or donors combined with possibilities to space them apart as needed, the extremely long spin coherence times, and the rich options for integration with classical electronics based on the same technology.

cond-mat.mes-hall↗

arXiv2016

On-Chip Microwave Quantum Hall Circulator

Circulators are non-reciprocal circuit elements integral to technologies including radar systems, microwave communication transceivers, and the readout of quantum information devices. Their non-reciprocity arises from the interference of microwaves over the centimetre-scale of the signal wavelength in the presence of bulky magnetic media that break time-reversal symmetry. Here we realize a completely passive on-chip microwave circulator with size one-thousandth the wavelength by exploiting the chiral, slow-light response of a 2-dimensional electron gas (2DEG) in the quantum Hall regime. For an integrated GaAs device with 330 um diameter and 1 GHz centre frequency, a non-reciprocity of 25 dB is observed over a 50 MHz bandwidth. Furthermore, the direction of circulation can be selected dynamically by varying the magnetic field, an aspect that may enable reconfigurable passive routing of microwave signals on-chip.

cond-mat.mes-hall↗

arXiv2015

An FPGA-based Instrumentation Platform for use at Deep Cryogenic Temperatures

We describe a cryogenic instrumentation platform incorporating commercially-available field-programmable gate arrays (FPGAs) configured to operate well beyond their specified temperature range. The instrument enables signal routing, multiplexing, and complex digital signal processing at temperatures approaching 4 kelvin and in close proximity to cooled devices or detectors within the cryostat. The cryogenic performance of the system is evaluated, including clock speed, error rates, and power consumption. Although constructed for the purpose of controlling and reading out quantum computing devices with low latency, the instrument is generic enough to be of broad use in a range of cryogenic applications.

physics.ins-det↗