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David Jiménez

Publications and source records attributed to David Jiménez.

45 records · Page 3Linked to original sources

Short channel effects in graphene-based field effect transistors targeting radio-frequency applications

Channel length scaling in graphene field effect transistors (GFETs) is key in the pursuit of higher performance in radio frequency electronics for both rigid and flexible substrates. Although two-dimensional (2D) materials provide a superior immunity to Short Channel Effects (SCEs) than bulk materials, they could dominate in scaled GFETs. In this work, we have developed a model that calculates electron and hole transport along the graphene channel in a drift-diffusion basis, while considering the 2D electrostatics. Our model obtains the self-consistent solution of the 2D Poisson's equation coupled to the current continuity equation, the latter embedding an appropriate model for drift velocity saturation. We have studied the role played by the electrostatics and the velocity saturation in GFETs with short channel lengths L. Severe scaling results in a high degradation of GFET output conductance. The extrinsic cutoff frequency follows a 1/L^n scaling trend, where the index n fulfills n < 2. The case n = 2 corresponds to long-channel GFETs with low source/drain series resistance, that is, devices where the channel resistance is controlling the drain current. For high series resistance, n decreases down to n= 1, and it degrades to values of n < 1 because of the SCEs, especially at high drain bias. The model predicts high maximum oscillation frequencies above 1 THz for channel lengths below 100 nm, but, in order to obtain these frequencies, it is very important to minimize the gate series resistance. The model shows very good agreement with experimental current voltage curves obtained from short channel GFETs and also reproduces negative differential resistance, which is due to a reduction of diffusion current.

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Large-Signal Model of Graphene Field-Effect Transistors -- Part II: Circuit Performance Benchmarking

This paper presents a circuit performance benchmarking using the large-signal model of graphene field effect transistor reported in Part I of this two-part paper. To test the model, it has been implemented in a circuit simulator. Specifically we have simulated a high-frequency performance amplifier, together with other circuits that take advantage of the ambipolarity of graphene, such as a frequency doubler, a radio-frequency subharmonic mixer and a multiplier phase detector. A variety of simulations comprising DC, transient dynamics, Bode diagram, S-parameters, and power spectrum have been compared with experimental data to assess the validity of the model.

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Large-Signal Model of Graphene Field-Effect Transistors -- Part I: Compact Modeling of GFET Intrinsic Capacitances

We present a circuit-compatible compact model of the intrinsic capacitances of graphene field-effect transistors (GFETs). Together with a compact drain current model, a large-signal model of GFETs is developed combining both models as a tool for simulating the electrical behavior of graphene-based integrated circuits, dealing with the DC, transient behavior, and frequency response of the circuit. The drain current model is based in a drift-diffusion mechanism for the carrier transport coupled with an appropriate field-effect approach. The intrinsic capacitance model consists of a 16-capacitance matrix including self-capacitances and transcapacitances of a four-terminal GFET. To guarantee charge conservation, a Ward-Dutton linear charge partition scheme has been used. The large-signal model has been implemented in Verilog-A, being compatible with conventional circuit simulators and serving as a starting point toward the complete GFET device model that could incorporate additional non-idealities.

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Large-signal model of the bilayer graphene field-effect transistor targeting radio-frequency applications: theory versus experiment

Bilayer graphene is a promising material for radio-frequency transistors because its energy gap might result in a better current saturation than the monolayer graphene. Because the great deal of interest in this technology, especially for flexible radio-frequency applications, gaining control of it requires the formulation of appropriate models for the drain current, charge and capacitance. In this work we have developed them for a dual-gated bilayer graphene field-effect transistor. A drift-diffusion mechanism for the carrier transport has been considered coupled with an appropriate field-effect model taking into account the electronic properties of the bilayer graphene. Extrinsic resistances have been included considering the formation of a Schottky barrier at the metal-bilayer graphene interface. The proposed model has been benchmarked against experimental prototype transistors, discussing the main figures of merit targeting radio-frequency applications.

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A physics based model of gate tunable metal-graphene contact resistance benchmarked against experimental data

The metal-graphene contact resistance is a technological bottleneck for the realization of viable graphene based electronics. We report a useful model to find the gate tunable components of this resistance determined by the sequential tunneling of carriers between the 3D-metal and 2D-graphene underneath followed by Klein tunneling to the graphene in the channel. This model quantifies the intrinsic factors that control that resistance, including the effect of unintended chemical doping. Our results agree with experimental results for several metals.

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Multilevel recording in Bi-deficient Pt/BFO/SRO heterostructures based on ferroelectric resistive switching targeting high-density information storage in nonvolatile memories

We demonstrate the feasibility of multilevel recording in Pt/Bi(1-d)FeO3/SrRuO3 capacitors using the ferroelectric resistive switching phenomenon exhibited by the Pt/Bi(1-d)FeO3 interface. A tunable population of up and down ferroelectric domains able to modulate the Schottky barrier height at the Pt/Bi(1-d)FeO3 interface can be achieved by means of either a collection of SET/RESET voltages or current compliances. This programming scheme gives rise to well defined resistance states, which form the basis for a multilevel storage nonvolatile memory.

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Impact of graphene polycrystallinity on the performance of graphene field-effect transistors

We have used a multi-scale physics-based model to predict how the grain size and different grain boundary morphologies of polycrystalline graphene will impact the performance metrics of graphene field-effect transistors. We show that polycrystallinity has a negative impact on the transconductance, which translates to a severe degradation of the maximum and cutoff frequencies. On the other hand, polycrystallinity has a positive impact on current saturation, and a negligible effect on the intrinsic gain. These results reveal the complex role played by graphene grain boundaries, and can be used to guide the further development and optimization of graphene-based electronic devices.

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Model of the Electrostatics and Tunneling Current of Metal-Graphene Junctions and Metal-Insulator-Graphene Heterostructures

In this paper we present a comprehensive model for the tunneling current of the metal-insulator-graphene heterostructure, based on the Bardeen Transfer Hamiltonian method, of the metal-insulator-graphene heterostructure. As a particular case we have studied the metal-graphene junction, unveiling the role played by different electrical and physical parameters in determining the differential contact resistance.

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Explicit drain current, charge and capacitance model of graphene field-effect transistors

I present a compact physics-based model of the drain current, charge and capacitance of graphene field-effect transistors, of relevance for exploration of DC, AC and transient behavior of graphene based circuits. The physical framework is a field-effect model and drift-diffusion carrier transport incorporating saturation velocity effects. First, an explicit model has been derived for the drain current. Using it as a basis, explicit closed-form expressions for the charge and capacitances based on the Ward-Dutton partition scheme, covering continuosly all operation regions. The model is of special interest for analog and radio-frequency applications where bandgap engineering of graphene could be not needed.

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