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Dmitri E. Nikonov

Publications and source records attributed to Dmitri E. Nikonov.

At least 55 records · Page 3Linked to original sources

Material Targets for Scaling All Spin Logic

All-spin logic devices are promising candidates to augment and complement beyond-CMOS integrated circuit computing due to non-volatility, ultra-low operating voltages, higher logical efficiency, and high density integration. However, the path to reach lower energy-delay product performance compared to CMOS transistors currently is not clear. We show that scaling and engineering the nanoscale magnetic materials and interfaces is the key to realizing spin logic devices that can surpass energy-delay performance of CMOS transistors. With validated stochastic nano-magnetic and vector spin transport numerical models, we derive the target material and interface properties for the nanomagnets and channels. We identified promising new directions for material engineering/discovery focusing on systematic scaling of magnetic anisotropy (Hk) with saturation magnetization (Ms), use of perpendicular magnetic anisotropy, and interface spin mixing conductance of ferromagnet/spin channel interface (Gmix). We provide systematic targets for scaling spin logic energy-delay product toward a 2 aJ.ns energy-delay product, comprehending the stochastic noise for nanomagnets.

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All Spin Nano-magnetic State Elements

We propose an all spin state element to enable all spin state machines using spin currents and nanomagnets. We demonstrate via numerical simulations the operation of a state element a critical building block for synchronous, sequential logic computation. The numerical models encompass Landau-Lifshitz-Gilbert (LLG) nanomagnet dynamics with stochastic models and vector spin-transport in metallic magnetic and non-magnetic channels. Combined with all spin combinatorial logic, the state elements can enable synchronous and asynchronous computing elements.

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Electron-Phonon Scattering in Planar MOSFETs: NEGF and Monte Carlo Methods

A formalism for incorporating electron-phonon scattering into the nonequilibrium Green's function (NEGF) framework that is applicable to planar MOSFETs is presented. Restructuring the NEGF equations in terms of approximate summation of transverse momentum modes leads to a rigorous and efficient method of solution. This helps to drastically reduce the computational complexity, allowing treatment of both quantum mechanics and dissipative electron-phonon scattering processes for device sizes from nanometers to microns. The formalism is systematically benchmarked against Monte Carlo solutions of the classical Boltzmann transport for model potential profiles. Results show a remarkably close agreement between the two methods for variety of channel lengths and bias conditions, both for elastic and inelastic scattering processes.

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Circuit Theory for SPICE of Spintronic Integrated Circuits

We present a theoretical and a numerical formalism for analysis and design of spintronic integrated circuits (SPINICs). The formalism encompasses a generalized circuit theory for spintronic integrated circuits based on nanomagnetic dynamics and spin transport. We propose an extension to the Modified Nodal Analysis technique for the analysis of spin circuits based on the recently developed spin conduction matrices. We demonstrate the applicability of the framework using an example spin logic circuit described using spin Netlists.

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Role of Phonon Scattering in Graphene Nanoribbon Transistors: Non-Equilibrium Green's Function Method with Real Space Approach

Mode space approach has been used so far in NEGF to treat phonon scattering for computational efficiency. Here we perform a more rigorous quantum transport simulation in real space to consider interband scatterings as well. We show a seamless transition from ballistic to dissipative transport in graphene nanoribbon transistors by varying channel length. We find acoustic phonon (AP) scattering to be the dominant scattering mechanism within the relevant range of voltage bias. Optical phonon scattering is significant only when a large gate voltage is applied. In a longer channel device, the contribution of AP scattering to the dc current becomes more significant.

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Proposal of a spin torque majority gate logic

A new spin based logic device is proposed. It is comprised of a common free ferromagnetic layer separated by a tunnel junction from three inputs and one output with separate fixed layers. It has the functionality of a majority gate and is switched by spin transfer torque. Validity of its logic operation is demonstrated by micromagnetic simulation. A version of such devices with perpendicular magnetization is examined. Switching encompasses moving domain walls. The device reuses most of the materials and structures from spin torque RAM, and is entirely compatible with CMOS technology.

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Simulation of the Spin Field Effect Transistors: Effects of Tunneling and Spin Relaxation on its Performance

A numerical simulation of spin-dependent quantum transport for a spin field effect transistor (spinFET) is implemented in a widely used simulator nanoMOS. This method includes the effect of both spin relaxation in the channel and the tunneling barrier between the source/drain and the channel. Account for these factors permits setting more realistic performance limits for the transistor, especially the magnetoresistance, which is found to be lower compared to earlier predictions. The interplay between tunneling and spin relaxation is elucidated by numerical simulation. Insertion of the tunneling barrier leads to an increased magnetoresistance. Numerical simulations are used to explore the tunneling barrier design issues.

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p-i-n Tunnel FETs vs. n-i-n MOSFETs: Performance Comparison from Devices to Circuits

The band-to-band tunneling transistors have some performance advantages over the conventional MOSFETs due to the <60mV/dec sub-threshold slope. In this paper, carbon nanotubes are used as a model channel material to address issues that we believe will apply to BTBT FETs vs. MOSFETs more generally. We use pz-orbital tight-binding Hamiltonian and the non-equilibrium Green function (NEGF) formalism for rigorous treatment of dissipative quantum transport. A device level comparison of p-i-n TFETs and n-i-n MOSFETs in both ballistic and dissipative cases has been performed previously. In this paper, the possibility of using p-i-n TFETs in ultra-low power sub-threshold logic circuits is investigated using a rigorous numerical simulator. The results show that, in sub-threshold circuit operation, the p-i-n TFETs have better DC characteristics, and can deliver ~15x higher performance at the iso-P_LEAKAGE, iso-VDD conditions. Because p-i-n TFETs can operate at lower VDD than n-i-n MOSFETs, they can deliver ~3x higher performance at the same power (P_OPERATION). This results in ~3x energy reduction under iso-delay conditions. Therefore the p-i-n TFETs are more suitable for sub-threshold logic operation.

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Strategies and tolerances of spin transfer torque switching

Schemes of switching nanomagnetic memories via the effect of spin torque with various polarizations of injected electrons are studied. Simulations based on macrospin and micromagnetic theories are performed and compared. We demonstrate that switching with perpendicularly polarized current by short pulses and free precession requires smaller time and energy than spin torque switching with collinear in plane spin polarization; it is also found to be superior to other kinds of memories. We study the tolerances of switching to the magnitude of current and pulse duration. An increased Gilbert damping is found to improve tolerances of perpendicular switching without increasing the threshold current, unlike in plane switching.

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Magnetoelectric Spin Wave Amplifier for Spin Wave Logic Circuits

We propose and analyze a spin wave amplifier aimed to enhance the amplitude of the propagating spin wave via the magnetoelectric effect. The amplifier is a two-layer multiferroic structure, which comprises piezoelectric and ferromagnetic materials. By applying electric field to the piezoelectric layer, the stress is produced. In turn, the stress changes the direction of the easy axis in the ferromagnetic layer and the direction of the anisotropy field. The rotation frequency of the easy axis is the same as the frequency of the spin wave propagating through the ferromagnetic layer. As a result of this two-stage process, the amplitude of the spin wave can be amplified depending on the angle of the easy axis rotation. We present results of numerical simulations illustrating the operation of the proposed amplifier. According to numerical estimates, the amplitude of the spin wave signal can be increased by several orders of magnitude. The energy efficiency of the electric-to-magnetic power conversion is discussed. The proposed amplifier preserves the phase of the initial signal, which is important for application to logic circuits based on spin waves.

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Modeling of Spin Metal-Oxide-Semiconductor Field-Effect-Transistor: A Non-Equilibrium Green's Function Approach with Spin Relaxation

A spin metal-oxide-semiconductor field-effect-transistor (spin MOSFET), which combines a Schottky-barrier MOSFET with ferromagnetic source and drain contacts, is a promising device for spintronic logic. Previous simulation studies predict that this device should display a very high magnetoresistance (MR) ratio (between the cases of parallel and anti-parallel magnetizations) for the case of half-metal ferromagnets (HMF). We use the non-equilibrium Green's function (NEGF) formalism to describe tunneling and carrier transport in this device and to incorporate spin relaxation at the HMF-semiconductor interfaces. Spin relaxation at interfaces results in non-ideal spin injection. Minority spin currents arise and dominate the leakage current for anti-parallel magnetizations. This reduces the MR ratio and sets a practical limit for spin MOSFET performance. We found that MR saturates at a lower value for smaller source-to-drain bias. In addition, spin relaxation at the detector side is found to be more detrimental to MR than that at the injector side, for drain bias less than the energy difference of the minority spin edge and the Fermi level.

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Performance comparison between p-i-n tunneling transistors and conventional MOSFETs

Field-effect transistors based on band-to-band tunneling (BTBT) have gained a lot of recent interest due to their potential for reducing power dissipation in integrated circuits. In this paper we present a detailed performance comparison between conventional n-i-n MOSFET transistors, and BTBT transistors based on the p-i-n geometry (p-i-n TFET), using semiconducting carbon nanotubes as the model channel material. Quantum transport simulations are performed using the nonequilibrium Green's function formalism including realistic phonon scattering. We find that the TFET can indeed produce subthreshold swings below the conventional MOSFET limit of 60mV/decade at room temperature leading to smaller off-currents and standby power dissipation. Phonon assisted tunneling, however, limits the off-state performance benefits that could have been achieved otherwise. Under on-state conditions the drive current and the intrinsic device delay of the TFET are mainly governed by the tunneling barrier properties. On the other hand, the switching energy for the TFET is observed to be fundamentally smaller than that for the MOSFET, reducing the dynamic power dissipation. Aforementioned reasons make the p-i-n geometry well suited for low power applications.

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Simulation of highly idealized, atomic scale MQCA logic circuits

Spintronics logic devices based on majority gates formed by atomic-level arrangements of spins in the crystal lattice is considered. The dynamics of switching is modeled by time-dependent solution of the density-matrix equation with relaxation. The devices are shown to satisfy requirements for logic. Switching speed and dissipated energy are calculated and compared with electronic transistors. The simulations show that for the highly idealized case assumed here, it is possible to trade off size for speed and achieve lower power operation than ultimately scaled CMOS devices.

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Influence of Phonon Scattering on the Performance of p-i-n Band-to-Band-Tunneling Transistors

Power dissipation has become a major obstacle in performance scaling of modern integrated circuits, and has spurred the search for devices operating at lower voltage swing. In this letter, we study p-i-n band-to-band tunneling field effect transistors (TFET) taking semiconducting carbon nanotubes as the channel material. The on-current of these devices is mainly limited by the tunneling barrier properties, and phonon scattering has only a moderate effect. We show, however, that the off-current is limited by phonon absorption assisted tunneling, and thus is strongly temperature-dependent. Subthreshold swings below the 60mV/decade conventional limit can be readily achieved even at room temperature. Interestingly, although subthreshold swing degrades due to the effects of phonon scattering, it remains low under practical biasing conditions.

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Ballistic Graphene Nanoribbon MOSFETs: a full quantum real-space simulation study

A real-space quantum transport simulator for carbon nanoribbon (CNR) MOSFETs has been developed. Using this simulator, the performance of carbon nanoribbon (CNR) MOSFETs is examined in the ballistic limit. The impact of quantum effects on device performance of CNR MOSFETs is also studied. We found that 2D semi-infinite graphene contacts provide metal-induced-gap-states (MIGS) in the CNR channel. These states would provide quantum tunneling in the short channel device and cause Fermi level pining. These effects cause device performance degradation both on the ON-state and the OFF-state. Pure 1D devices (infinite contacts), however, show no MIGS. Quantum tunneling effects are still playing an important role in the device characteristics. Conduction due to band-to-band tunneling is accurately captured in our simulations. It is important in these devices, and found to dominate the off-state current. Based on our simulations, both a 1.4nm wide and a 1.8nm wide CNR with channel length of 12.5nm can outperform ultra scaled Si devices in terms of drive current capabilities and electrostatic control. Although subthreshold slopes in the forward-bias conduction are better than in Si transistors, tunneling currents are important and prevent the achievement of the theoretical limit of 60mV/dec.

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Feasibility Study of Logic Circuits with Spin Wave Bus

We present a feasibility study of logic circuits utilizing spin waves for information transmission and processing. As an alternative approach to the transistor-based architecture, logic circuits with spin wave bus do not use charge as an information carrier. In this work we describe the general concept of logic circuits with spin wave bus and illustrate its performance by numerical simulations based on available experimental data. Theoretical estimates and results of numerical simulations on signal attenuation, signal phase velocity, and the minimum spin wave energy required per bit in the spin bus are obtained. The transport parameters are compared with ones for conventional electronic transmission lines. Spin Wave Bus is not intended to substitute traditional metal interconnects since it has higher signal attenuation and lower signal propagation speed. The potential value of spin wave bus is, however, an interface between electronic circuits and integrated spintronics circuits. The logic circuits with spin wave bus allow us to provide wireless read-in and read-out.

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Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon assisted tunneling

Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the non-equilibrium Green's functions formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (Y. Lu et al, J. Am. Chem. Soc., v. 128, p. 3518-3519, 2006), we have obtained strong evidence that BTBT in CNT-MOSFETs is dominated by optical phonon assisted inelastic transport, which can have important implications on the transistor characteristics. It is shown that under large biasing conditions two-phonon scattering may also become important.

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Non-equilibrium Green's function treatment of phonon scattering in carbon nanotube transistors

We present the detailed treatment of dissipative quantum transport in carbon nanotube field-effect transistors (CNTFETs) using the non-equilibrium Green's function formalism. The effect of phonon scattering on the device characteristics of CNTFETs is explored using extensive numerical simulation. Both intra-valley and inter-valley scattering mediated by acoustic (AP), optical (OP), and radial breathing mode (RBM) phonons are treated. Realistic phonon dispersion calculations are performed using force-constant methods, and electron-phonon coupling is determined through microscopic theory. Specific simulation results are presented for (16,0), (19,0), and (22,0) zigzag CNTFETs that are in the experimentally useful diameter range. We find that the effect of phonon scattering on device performance has a distinct bias dependence. Up to moderate gate biases the influence of high-energy OP scattering is suppressed, and the device current is reduced due to elastic back-scattering by AP and low-energy RBM phonons. At large gate biases the current degradation is mainly due to high-energy OP scattering. The influence of both AP and high-energy OP scattering is reduced for larger diameter tubes. The effect of RBM mode, however, is nearly independent of the diameter for the tubes studied here.

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