arXiv subjects

Ian A. Young

Publications and source records attributed to Ian A. Young.

At least 37 records · Page 2Linked to original sources

arXiv2018

Voltage Control of Uni-directional Anisotropy in Ferromagnet-Multiferroic System

Demonstration of ultra-low energy switching mechanisms is an imperative for continued improvements in computing devices. Ferroelectric (FE) and multiferroic (MF) orders and their manipulation promises an ideal combination of state variables to reach atto-Joule range for logic and memory (i.e., ~ 30X lower switching energy than nanoelectronics). In BiFeO3 the coupling between the antiferromagnetic (AFM) and FE orders is robust at room temperature, scalable in voltage, stabilized by the FE order, and can be integrated into a fabrication process for a beyond-CMOS era. The presence of the AFM order and a canted magnetic moment in this system causes exchange interaction with a ferromagnet such as CoFe or LSMO. While previous work has shown that exchange coupling (uniaxial anisotropy) can be controlled with an electric field, several puzzling issues remain. Perhaps the most intriguing among them is that the BiFeO3-CoFe bilayer did not demonstrate any electrically controlled directional anisotropy, i.e., an exchange bias, which is a potential mechanism for 180o magnetic reversal and is independent of switching kinetics. However, what is needed/preferred for logic and memory is a magneto-electric mechanism that works analogous to an applied field, i.e a uni-directional anisotropy that is voltage modulated. Here, we present the evidence of electrical control of exchange bias of a laterally scaled spin valve that is exchange-coupled to BiFeO3 at room temperature. We show that the exchange bias in this bilayer is thermally robust, electrically controlled and reversible. We anticipate that magneto-electricity at such scaled dimensions provides a powerful pathway for computing beyond the modern nanoelectronics transistors by enabling a new class of non-volatile, ultra-low energy computing elements.

cond-mat.mes-hall↗

arXiv2017

Clocked Magnetostriction-Assisted Spintronic Device Design and Simulation

We propose a heterostructure device comprised of magnets and piezoelectrics that significantly improves the delay and the energy dissipation of an all-spin logic (ASL) device. This paper studies and models the physics of the device, illustrates its operation, and benchmarks its performance using SPICE simulations. We show that the proposed device maintains low voltage operation, non-reciprocity, non-volatility, cascadability, and thermal reliability of the original ASL device. Moreover, by utilizing the deterministic switching of a magnet from the saddle point of the energy profile, the device is more efficient in terms of energy and delay and is robust to thermal fluctuations. The results of simulations show that compared to ASL devices, the proposed device achieves 21x shorter delay and 27x lower energy dissipation per bit for a 32-bit arithmetic-logic unit (ALU).

physics.app-ph↗

arXiv2017

Patterns and Thresholds of Magnetoelectric Switching in Spin Logic Devices

In the quest to develop spintronic logic, it was discovered that magnetoelectric switching results in lower energy and shorter switching time than other mechanisms. Magnetoelectric (ME) field due to exchange bias at the interface with a multi-ferroic (such as BiFeO3) is well suited for 180 degree switching of magnetization. The ME field is determined by the direction of canted magnetization in BiFeO3 which can point at an angle to the plane, to which voltage is applied. Dependence of switching time and the threshold of ME field on its angles was determined by micromagnetic simulations. Switching occurs by formation of a domain wall on the side of the nanomagnet on top of BFO and its propagation to the rest of the magnet. For in-plane magnetization, switching occurs over a wide range of angles and at all magnitudes of ME field above threshold. For out-of-plane magnetization failure occurs (with an exception of a narrow range of angles and magnitudes of ME field) due to the domain wall reflecting from the opposite end of the nanomagnet.

cond-mat.mes-hall↗

arXiv2017

Physical Origin of Transient Negative Capacitance in a Ferroelectric Capacitor

Transient negative differential capacitance (NC), the dynamic reversal of transient capacitance in an electrical circuit is of highly technological and scientific interest since it probes the foundation of ferroelectricity. In this letter, we study a resistor-ferroelectric capacitor (R-FeC) network through a series of coupled equations based on Kirchhoff's law, Electrostatics, and Landau theory. We show that transient NC in a R-FeC circuit originates from the mismatch between rate of free charge change on the metal plate and that of bound charge change in a ferroelectric (FE) capacitor during polarization switching. This transient charge dynamic mismatch is driven by the negative curvature of the FE free energy landscape. It is also analytically shown that a free energy profile with the negative curvature is the only physical system that can describe transient NC during the two-state switching in a FE capacitor. Furthermore, this transient charge dynamic mismatch is justified by the dependence of external resistance and intrinsic FE viscosity coefficient. The depolarization effect on FE capacitors also shows the importance of negative curvature to transient NC. The relation between transient NC and negative curvature provides a direct insight into the free energy landscape during the FE switching.

physics.app-ph↗

arXiv2017

A Thermodynamic Perspective of Negative-capacitance Field-effect-transistors

Physical phenomena underlying operation of ferroelectric field-effect transistors (FeFETs) is treated within a unified simulation framework. The framework incorporates the Landau mean-field treatment of free energy of a ferroelectric and the polarization dynamics according to Landau-Khalatnikov (LK) equation. These equations are self-consistently solved with the one-dimensional metal-oxide-semiconductor (MOS) structure electrostatics and the drift-diffusion solution for the current in the semiconductor channel. Numerical simulations demonstrate, depending on the ferroelectric (FE) thickness, both regimes of hysteresis switching (relevant for a non-volatile memory) and of higher on-currents and steeper subthreshold slope (SS) with a negligible hysteresis (relevant for logic) via the negative capacitance effect.

physics.app-ph↗

arXiv2017

Overcoming thermal noise in non-volatile spin wave logic

Spin waves are propagating disturbances in magnetically ordered materials, analogous to lattice waves in solid systems and are often described from a quasiparticle point of view as magnons. The attractive advantages of Joule-heat-free transmission of information, utilization of the phase of the wave as an additional degree of freedom and lower footprint area compared to conventional charge-based devices have made spin waves or magnon spintronics a promising candidate for beyond-CMOS wave-based computation. However, any practical realization of an all-magnon based computing system must undergo the essential steps of a careful selection of materials and demonstrate robustness with respect to thermal noise or variability. Here, we aim at identifying suitable materials and theoretically demonstrate the possibility of achieving error-free clocked non-volatile spin wave logic device, even in the presence of thermal noise and clock jitter or clock skew.

cond-mat.mes-hall↗

arXiv2017

Spin-Orbit Logic with Magnetoelectric Nodes: A Scalable Charge Mediated Nonvolatile Spintronic Logic

As nanoelectronics approaches the nanometer scale, a massive effort is underway to identify the next scalable logic technology beyond Complementary Metal Oxide Semiconductor (CMOS) computing. Such computing technology needs to improve switching energy & delay at reduced dimensions, allow improved interconnects and provide a complete logic/memory family. However, a viable beyond-CMOS logic technology has remained elusive. Here, we propose a scalable spintronic logic device which operates via spin-orbit transduction combined with magneto-electric switching. The proposed Magneto-Electric Spin Orbit (MESO) logic enables a new paradigm to continue scaling of logic performance to near thermodynamic limits for GHz logic (100 kT switching energy at 100 ps delay). The proposed MESO devices scale strongly and favorably with critical dimensions of the device, showing a cubic dependence of switching energy on size, (E_m proportional to W^3), and square dependence on voltage (E_m proportional to V^2). The excellent scaling is obtained thanks to the properties of the spin orbit effects (e.g. Inverse Spin Hall Effect (ISHE) and Inverse Rashba-Edelstein Effect (IREE)) and the dependence of capacitance on size. The operating voltages for these devices are predicted to be < 100 mV allowing a significant jump ahead of historic trends of scaling voltage with size and corresponding reduction of energy. Interconnect resistance is a critical obstacle for scaling beyond 10 nm dimensions. We project a less detrimental impact of interconnect resistance and show that MESO logic is amenable for highly resistive interconnects (100 uOhm.cm-1 mOhm.cm) which opens a possibility to use nano-metallic (width < bulk electron mean free path) or doped semiconducting wires (width<5 nm). A scalable, CMOS compatible, non-volatile logic family proposed here may enable the next multi-generational scaling of computing devices.

cond-mat.mes-hall↗

arXiv2017

Response to Comment on 'Spin-Orbit Logic with Magnetoelectric Nodes: A Scalable Charge Mediated Nonvolatile Spintronic Logic' (arXiv:1607.06690)

In this technical note, we address the comments on the energy estimates for Magnetoelectric Spin-orbit (MESO) Logic, a new logic device proposed by the authors. We provide an analytical derivation of the switching energy, and support it with time-domain circuit simulations using a self-consistent ferroelectric (FE) compact model. While the energy to charge a capacitor is dissipated in the interconnect and transistor resistance, we note that the energy to switch a capacitor and a FE is independent of the interconnect resistance value to the first order. Also device design can mitigate the parasitic energy losses. We further show the circuit simulations for a sub 10 aJ switching operation of a MESO logic device comprehending: a) Energy stored in multiferroic; b) Energy dissipation in the resistance of the interconnect, Ric ; c) Energy dissipation in the inverse spin-orbit coupling (ISOC) spin to charge converter Risoc; d) Supply, ground resistance, and transistor losses. We also identify the requirements for the resistivity of the spin-orbit coupling materials and address the effect of internal resistance of the spin to charge conversion layer. We provide the material parameter space where MESO (with a fan-out of 1 and interconnect) achieves sub 10 aJ switching energy with path for scaling via ferroelectric/magnetoelectric/spin-orbit materials development.

cond-mat.mes-hall↗

arXiv2017

Shannon-inspired Statistical Computing to Enable Spintronics

Modern computing systems based on the von Neumann architecture are built from silicon complementary metal oxide semiconductor (CMOS) transistors that need to operate under practically error free conditions with 1 error in $10^{15}$ switching events. The physical dimensions of CMOS transistors have scaled down over the past five decades leading to exponential increases in functional density and energy consumption. Today, the energy and delay reductions from scaling have stagnated, motivating the search for a CMOS replacement. Of these, spintronics offers a path for enhancing the functional density and scaling the energy down to fundamental thermodynamic limits of 100kT to 1000kT. However, spintronic devices exhibit high error rates of 1 in 10 or more when operating at these limits, rendering them incompatible with deterministic nature of the von Neumann architecture. We show that a Shannon-inspired statistical computing framework can be leveraged to design a computer made from such stochastic spintronic logic gates to provide a computational accuracy close to that of a deterministic computer. This extraordinary result allowing a $10^{13}$ fold relaxation in acceptable error rates is obtained by engineering the error distribution coupled with statistical error compensation.

cs.ET↗

arXiv2016

Low-power Spin Valve Logic using Spin-transfer Torque with Automotion of Domain Walls

A novel scheme for non-volatile digital computation is proposed using spin-transfer torque (STT) and automotion of magnetic domain walls (DWs). The basic computing element is composed of a lateral spin valve (SV) with two ferromagnetic (FM) wires served as interconnects, where DW automotion is used to propagate the information from one device to another. The non-reciprocity of both device and interconnect is realized by sizing different contact areas at the input and the output as well as enhancing the local damping mechanism. The proposed logic is suitable for scaling due to a high energy barrier provided by a long FM wire. Compared to the scheme based on non-local spin valves (NLSVs) in the previous proposal, the devices can be operated at lower current density due to utilizing all injected spins for local magnetization reversals, and thus improve both energy efficiency and resistance to electromigration. This device concept is justified by simulating a buffer, an inverter, and a 3-input majority gate with comprehensive numerical simulations, including spin transport through the FM/non-magnetic (NM) interfaces as well as the NM channel and stochastic magnetization dynamics inside FM wires. In addition to digital computing, the proposed framework can also be used as a transducer between DWs and spin currents for higher wiring flexibility in the interconnect network.

cs.ET↗

arXiv2016

Experimental Demonstration of Efficient Spin-Orbit Torque Switching of an MTJ with sub-100 ns Pulses

Efficient generation of spin currents from charge currents is of high importance for memory and logic applications of spintronics. In particular, generation of spin currents from charge currents in high spin-orbit coupling metals has the potential to provide a scalable solution for embedded memory. We demonstrate a net reduction in critical charge current for spin torque driven magnetization reversal via using spin-orbit mediated spin current generation. We scaled the dimensions of the spin-orbit electrode to 400 nm and the nanomagnet to 270 nm x 68 nm in a three terminal spin-orbit torque, magnetic tunnel junction (SOT-MTJ) geometry. Our estimated effective spin Hall angle is 0.15-0.20 using the ratio of zero temperature critical current from spin Hall switching and estimated spin current density for switching the magnet. We show bidirectional transient switching using spin-orbit generated spin torque at 100 ns switching pulses reliably followed by transient read operations. We finally compare the static and dynamic response of the SOT-MTJ with transient spin circuit modeling showing the performance of scaled SOT-MTJs to enable nanosecond class non-volatile MTJs.

cond-mat.mes-hall↗

arXiv2014

Experimental Demonstration of the Co-existence of the Spin Hall and Rashba Effects in beta-Tantalum/Ferromagnet Bilayers

We have measured the spin torques of beta-Tantalum / Co20Fe60B20 bilayers versus Ta thickness at room temperature using an FMR technique. The spin Hall coefficient was calculated both from the observed change in damping coefficient of the ferromagnet with Ta thickness, and from the ratio of the symmetric and anti-symmetric components of the FMR signal. Results from these two methods yielded values for the spin Hall coefficient of -0.090+/-0.005 and -0.11+/-0.01, respectively. We have also identified a significant out-of-plane spin torque originating from Ta, which is constant with Ta thickness. We ascribe this to an interface spin orbit coupling, or Rashba effect, due to the strength and constancy of the torque with Ta thickness. From fitting measured data to a model including interface spin orbit coupling, we have determined the spin diffusion length for beta-Tantalum to be ~2.5 nm.

cond-mat.mtrl-sci↗

arXiv2014

Convolutional Networks for Image Processing by Coupled Oscillator Arrays

A coupled oscillator array is shown to approximate convolutions with Gabor filters for image processing tasks. Pixelated image fragments and filter functions are converted to voltages, differenced, and input into a corresponding array of weakly coupled Voltage Controlled Oscillators (VCOs). This is referred to as Frequency Shift Keying (FSK). Upon synchronization of the array, the common node amplitude provides a metric for the degree of match between the image fragment and the filter function. The optimal oscillator parameters for synchronization are determined and favor a moderate value of the Q-factor.

nlin.PS↗

arXiv2013

Automotion of Domain Walls for Spintronic Interconnects

We simulate automotion, the spontaneous transport of a magnetic domain wall under the influence of demagnetization and magnetic anisotropy, in nanoscale spintronic interconnects. In contrast to spin transfer driven magnetic domain wall motion, the proposed interconnects operate with only a transient current pulse and provide favorable scaling down to the 20nm scale. Cases of both in-plane and perpendicular magnetization are considered. Analytical dependence of the velocity of domain walls on the angle of magnetization are compared with full micromagnetic simulations. Deceleration, disappearance, and reflection of domain walls are demonstrated. Dependences of the magnetization angle on the current pulse parameters are studied. The energy and delay analysis suggests that automotion is an attractive option for spintronic logic interconnects.

cond-mat.mes-hall↗

arXiv2013

Charge-Resistance Approach to Benchmarking Performance of Beyond-CMOS Information Processing Devices

Multiple beyond-CMOS information processing devices are presently under active research and require methods of benchmarking them. A new approach for calculating the performance metric, energy-delay product, of such devices is proposed. The approach involves estimating the device properties of resistance and switching charge, rather than dynamic evolution characteristics, such as switching energy and time. Application of this approach to a wide class of charge-based and non-charge based devices is discussed. The approach suggests pathways for improving the performance of beyond-CMOS devices and a new realistic limit for energy-delay product in terms of the Planks constant.

cond-mat.mes-hall↗

arXiv2013

Coupled-Oscillator Associative Memory Array Operation

Operation of the array of coupled oscillators underlying the associative memory function is demonstrated for various interconnection schemes (cross-connect, star phase keying and star frequency keying) and various physical implementation of oscillators (van der Pol, phase-locked loop, spin torque). The speed of synchronization of oscillators and the evolution of the degree of matching is studied as a function of device parameters. The dependence of errors in association on the number of the memorized patterns and the distance between the test and the memorized pattern is determined for Palm, Furber and Hopfield association algorithms.

cond-mat.mes-hall↗

arXiv2013

Overview of Beyond-CMOS Devices and A Uniform Methodology for Their Benchmarking

Multiple logic devices are presently under study within the Nanoelectronic Research Initiative (NRI) to carry the development of integrated circuits beyond the CMOS roadmap. Structure and operational principles of these devices are described. Theories used for benchmarking these devices are overviewed, and a general methodology is described for consistent estimates of the circuit area, switching time and energy. The results of the comparison of the NRI logic devices using these benchmarks are presented.

cond-mat.mes-hall↗

arXiv2013

Voltage and Energy-Delay Performance of Giant Spin Hall Effect Switching for Magnetic Memory and Logic

In this letter, we show that Giant Spin Hall Effect (GSHE) MRAM can enable better energy- delay and voltage performance than traditional MTJ based spin torque devices at scaled nanomagnet dimensions (10-30 nm). Firstly, we derive the effect of dimensional scaling on spin injection efficiency, voltage-delay and energy-delay of spin torque switching using MTJs and GSHE and identify the optimum electrode geometry for low operating voltage (<0.1 V), high speed (>10 GHz) operation. We show that effective spin injection efficiency >100 % can be obtained using optimum spin hall electrode thickness for 30 nm nanomagnet widths. Finally, we derive the energy-delay trajectory of GSHE and MTJ devices to calculate the energy-delay product of GSHE and MTJ devices with an energy minimum at the characteristic time of the magnets. Optimized GSHE devices when combined with PMA can enable MRAM with scaled nanomagnets (30 nm X 60 nm), ultra-low voltage operation (< 0.1 V), fast switching times (10 ps) and switching energy as low as 100 aJ/bit.

cond-mat.mes-hall↗