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M. F. Gonzalez-Zalba

Publications and source records attributed to M. F. Gonzalez-Zalba.

At least 19 recordsLinked to original sources

A superinductor in a deep sub-micron integrated circuit

Superinductors are circuit elements characterised by an intrinsic impedance in excess of the superconducting resistance quantum ($R_\text{Q}\approx6.45~$k$Ω$), with applications from metrology and sensing to quantum computing. However, they are typically obtained using exotic materials with high density inductance such as Josephson junctions, superconducting nanowires or twisted two-dimensional materials. Here, we present a superinductor realised within a silicon integrated circuit (IC), exploiting the high kinetic inductance ($\sim 1$~nH/$\square$) of TiN thin films native to the manufacturing process (22-nm FDSOI). By interfacing the superinductor to a silicon quantum dot formed within the same IC, we demonstrate a radio-frequency single-electron transistor (rfSET), the most widely used sensor in semiconductor-based quantum computers. The integrated nature of the rfSET reduces its parasitics which, together with the high impedance, yields a sensitivity improvement of more than two orders of magnitude over the state-of-the-art, combined with a 10,000-fold area reduction. Beyond providing the basis for dense arrays of integrated and high-performance qubit sensors, the realization of high-kinetic-inductance superconducting devices integrated within modern silicon ICs opens many opportunities, including kinetic-inductance detector arrays for astronomy and the study of metamaterials and quantum simulators based on 1D and 2D resonator arrays.

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Unified linear response theory of quantum electronic circuits

Modelling the electrical response of multi-level quantum systems at finite frequency has been typically performed in the context of two incomplete paradigms: (i) input-output theory, which is valid at any frequency but neglects dynamic losses, and (ii) semiclassical theory, which captures well dynamic dissipation effects but is only accurate at low frequencies. Here, we develop a unifying theory, valid for arbitrary frequencies, that captures both the quantum behaviour and the non-unitary effects introduced by relaxation and dephasing. The theory allows a multi-level system to be described by a universal small-signal equivalent circuit model, a resonant RLC circuit, whose topology only depends on the number of energy levels. We apply our model to a double quantum-dot charge qubit and a Majorana qubit, showing the capability to continuously describe the systems from adiabatic to resonant and from coherent to incoherent, suggesting new and realistic experiments for improved quantum state readout. Our model will facilitate the design of hybrid quantum-classical circuits and the simulation of qubit control and quantum state readout.

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Beyond-adiabatic Quantum Admittance of a Semiconductor Quantum Dot at High Frequencies: Rethinking Reflectometry as Polaron Dynamics

Semiconductor quantum dots operated dynamically are the basis of many quantum technologies such as quantum sensors and computers. Hence, modelling their electrical properties at microwave frequencies becomes essential to simulate their performance in larger electronic circuits. Here, we develop a self-consistent quantum master equation formalism to obtain the admittance of a quantum dot tunnel-coupled to a charge reservoir under the effect of a coherent photon bath. We find a general expression for the admittance that captures the well-known semiclassical (thermal) limit, along with the transition to lifetime and power broadening regimes due to the increased coupling to the reservoir and amplitude of the photonic drive, respectively. Furthermore, we describe two new photon-mediated regimes: Floquet broadening, determined by the dressing of the QD states, and broadening determined by photon loss in the system. Our results provide a method to simulate the high-frequency behaviour of QDs in a wide range of limits, describe past experiments, and propose novel explorations of QD-photon interactions.

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Alternative fast quantum logic gates using nonadiabatic Landau-Zener-Stückelberg-Majorana transitions

A conventional realization of quantum logic gates and control is based on resonant Rabi oscillations of the occupation probability of the system. This approach has certain limitations and complications, like counter-rotating terms. We study an alternative paradigm for implementing quantum logic gates based on Landau-Zener-Stückelberg-Majorana (LZSM) interferometry with non-resonant driving and the alternation of adiabatic evolution and non-adiabatic transitions. Compared to Rabi oscillations, the main differences are a non-resonant driving frequency and a small number of periods in the external driving. We explore the dynamics of a multilevel quantum system under LZSM drives and optimize the parameters for increasing single- and two-qubit gates speed. We define the parameters of the external driving required for implementing some specific gates using the adiabatic-impulse model. The LZSM approach can be applied to a large variety of multi-level quantum systems and external driving, providing a method for implementing quantum logic gates on them.

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Pipeline quantum processor architecture for silicon spin qubits

Noisy intermediate-scale quantum (NISQ) devices seek to achieve quantum advantage over classical systems without the use of full quantum error correction. We propose a NISQ processor architecture using a qubit `pipeline' in which all run-time control is applied globally, reducing the required number and complexity of control and interconnect resources. This is achieved by progressing qubit states through a layered physical array of structures which realise single and two-qubit gates. Such an approach lends itself to NISQ applications such as variational quantum eigensolvers which require numerous repetitions of the same calculation, or small variations thereof. In exchange for simplifying run-time control, a larger number of physical structures is required for shuttling the qubits as the circuit depth now corresponds to an array of physical structures. However, qubit states can be `pipelined' densely through the arrays for repeated runs to make more efficient use of physical resources. We describe how the qubit pipeline can be implemented in a silicon spin-qubit platform, to which it is well suited to due to the high qubit density and scalability. In this implementation, we describe the physical realisation of single and two qubit gates which represent a universal gate set that can achieve fidelities of $\mathcal{F} \geq 0.9999$, even under typical qubit frequency variations.

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Scaling silicon-based quantum computing using CMOS technology: State-of-the-art, Challenges and Perspectives

Complementary metal-oxide semiconductor (CMOS) technology has radically reshaped the world by taking humanity to the digital age. Cramming more transistors into the same physical space has enabled an exponential increase in computational performance, a strategy that has been recently hampered by the increasing complexity and cost of miniaturization. To continue achieving significant gains in computing performance, new computing paradigms, such as quantum computing, must be developed. However, finding the optimal physical system to process quantum information, and scale it up to the large number of qubits necessary to build a general-purpose quantum computer, remains a significant challenge. Recent breakthroughs in nanodevice engineering have shown that qubits can now be manufactured in a similar fashion to silicon field-effect transistors, opening an opportunity to leverage the know-how of the CMOS industry to address the scaling challenge. In this article, we focus on the analysis of the scaling prospects of quantum computing systems based on CMOS technology.

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An elongated quantum dot as a distributed charge sensor

Increasing the separation between semiconductor quantum dots offers scaling advantages by fa- cilitating gate routing and the integration of sensors and charge reservoirs. Elongated quantum dots have been utilized for this purpose in GaAs heterostructures to extend the range of spin-spin interactions. Here, we study a metal-oxide-semiconductor (MOS) device where two quantum dot arrays are separated by an elongated quantum dot (340 nm long, 50 nm wide). We monitor charge transitions of the elongated quantum dot by measuring radiofrequency single-electron currents to a reservoir to which we connect a lumped-element resonator. We operate the dot as a single electron box to achieve charge sensing of remote quantum dots in each array, separated by a distance of 510 nm. Simultaneous charge detection on both ends of the elongated dot demonstrates that the charge is well distributed across its nominal length, supported by the simulated quantum-mechanical electron density. Our results illustrate how single-electron boxes can be realised with versatile foot- prints that may enable novel and compact quantum processor layouts, offering distributed charge sensing in addition to the possibility of mediated coupling.

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A quantum dot-based frequency multiplier

Silicon offers the enticing opportunity to integrate hybrid quantum-classical computing systems on a single platform. For qubit control and readout, high-frequency signals are required. Therefore, devices that can facilitate its generation are needed. Here, we present a quantum dot-based radiofrequency multiplier operated at cryogenic temperatures. The device is based on the non-linear capacitance-voltage characteristics of quantum dot systems arising from their low-dimensional density of states. We implement the multiplier in a multi-gate silicon nanowire transistor using two complementary device configurations: a single quantum dot coupled to a charge reservoir and a coupled double quantum dot. We study the harmonic voltage conversion as a function of energy detuning, multiplication factor and harmonic phase noise and find near ideal performance up to a multiplication factor of 10. Our results demonstrate a method for high-frequency conversion that could be readily integrated into silicon-based quantum computing systems and be applied to other semiconductors.

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Fast high-fidelity single-shot readout of spins in silicon using a single-electron box

Three key metrics for readout systems in quantum processors are measurement speed, fidelity and footprint. Fast high-fidelity readout enables mid-circuit measurements, a necessary feature for many dynamic algorithms and quantum error correction, while a small footprint facilitates the design of scalable, highly-connected architectures with the associated increase in computing performance. Here, we present two complementary demonstrations of fast high-fidelity single-shot readout of spins in silicon quantum dots using a compact, dispersive charge sensor: a radio-frequency single-electron box. The sensor, despite requiring fewer electrodes than conventional detectors, performs at the state-of-the-art achieving spin read-out fidelity of 99.2% in less than 6 $μ$s. We demonstrate that low-loss high-impedance resonators, highly coupled to the sensing dot, in conjunction with Josephson parametric amplification are instrumental in achieving optimal performance. We quantify the benefit of Pauli spin blockade over spin-dependent tunneling to a reservoir, as the spin-to-charge conversion mechanism in these readout schemes. Our results place dispersive charge sensing at the forefront of readout methodologies for scalable semiconductor spin-based quantum processors.

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Compilation and scaling strategies for a silicon quantum processor with sparse two-dimensional connectivity

Inspired by the challenge of scaling up existing silicon quantum hardware, we investigate compilation strategies for sparsely-connected 2d qubit arrangements and propose a spin-qubit architecture with minimal compilation overhead. Our architecture is based on silicon nanowire split-gate transistors which can form finite 1d chains of spin-qubits and allow the execution of two-qubit operations such as Swap gates among neighbors. Adding to this, we describe a novel silicon junction which can couple up to four nanowires into 2d arrangements via spin shuttling and Swap operations. Given these hardware elements, we propose a modular sparse 2d spin-qubit architecture with unit cells consisting of diagonally-oriented squares with nanowires along the edges and junctions on the corners. We show that this architecture allows for compilation strategies which outperform the best-in-class compilation strategy for 1d chains, not only asymptotically, but also down to the minimal structure of a single square. The proposed architecture exhibits favorable scaling properties which allow for balancing the trade-off between compilation overhead and co-location of classical control electronics within each square by adjusting the length of the nanowires. An appealing feature of the proposed architecture is its manufacturability using complementary-metal-oxide-semiconductor (CMOS) fabrication processes. Finally, we note that our compilation strategies, while being inspired by spin-qubits, are equally valid for any other quantum processor with sparse 2d connectivity.

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Non-galvanic calibration and operation of a quantum dot thermometer

A cryogenic quantum dot thermometer is calibrated and operated using only a single non-galvanic gate connection. The thermometer is probed with radio-frequency reflectometry and calibrated by fitting a physical model to the phase of the reflected radio-frequency signal taken at temperatures across a small range. Thermometry of the source and drain reservoirs of the dot is then performed by fitting the calibrated physical model to new phase data. The thermometer can operate at the transition between thermally broadened and lifetime broadened regimes, and outside the temperatures used in calibration. Electron thermometry was performed at temperatures between $3.0\,\mathrm{K}$ and $1.0\,\mathrm{K}$, in both a $1\,\mathrm{K}$ cryostat and a dilution refrigerator. The experimental setup allows fast electron temperature readout with a sensitivity of $4.0\pm0.3 \, \mathrm{mK}/\sqrt{\mathrm{Hz}}$, at Kelvin temperatures. The non-galvanic calibration process gives a readout of physical parameters, such as the quantum dot lever arm. The demodulator used for reflectometry readout is readily available and very affordable.

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Charge noise and overdrive errors in reflectometry-based charge, spin and Majorana qubit readout

Solid-state qubits incorporating quantum dots can be read out by gate reflectometry. Here, we theoretically describe physical mechanisms that render such reflectometry-based readout schemes imperfect. We discuss charge qubits, singlet-triplet spin qubits, and Majorana qubits. In our model, we account for readout errors due to slow charge noise, and due to overdriving, when a too strong probe is causing errors. A key result is that for charge and spin qubits, the readout fidelity saturates at large probe strengths, whereas for Majorana qubits, there is an optimal probe strength which provides a maximized readout fidelity. We also point out the existence of severe readout errors appearing in a resonance-like fashion as the pulse strength is increased, and show that these errors are related to probe-induced multi-photon transitions. Besides providing practical guidelines toward optimized readout, our study might also inspire ways to use gate reflectometry for device characterization.

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Spin readout of a CMOS quantum dot by gate reflectometry and spin-dependent tunnelling

Silicon spin qubits are promising candidates for realising large scale quantum processors, benefitting from a magnetically quiet host material and the prospects of leveraging the mature silicon device fabrication industry. We report the measurement of an electron spin in a singly-occupied gate-defined quantum dot, fabricated using CMOS compatible processes at the 300 mm wafer scale. For readout, we employ spin-dependent tunneling combined with a low-footprint single-lead quantum dot charge sensor, measured using radiofrequency gate reflectometry. We demonstrate spin readout in two devices using this technique, obtaining valley splittings in the range 0.5-0.7 meV using excited state spectroscopy, and measure a maximum electron spin relaxation time ($T_1$) of $9 \pm 3$ s at 1 Tesla. These long lifetimes indicate the silicon nanowire geometry and fabrication processes employed here show a great deal of promise for qubit devices, while the spin-readout method demonstrated here is well-suited to a variety of scalable architectures.

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Gate reflectometry for probing charge and spin states in linear Si MOS split-gate arrays

We fabricated linear arrangements of multiple splitgate devices along an SOI mesa, thus forming a 2xN array of individually controllable Si quantum dots (QDs) with nearest neighbor coupling. We implemented two different gate reflectometry-based readout schemes to either probe spindependent charge movements by a coupled electrometer with single-shot precision, or directly sense a spin-dependent quantum capacitance. These results bear significance for fast, high-fidelity single-shot readout of large arrays of foundrycompatible Si MOS spin qubits.

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Fast gate-based readout of silicon quantum dots using Josephson parametric amplification

Spins in silicon quantum devices are promising candidates for large-scale quantum computing. Gate-based sensing of spin qubits offers compact and scalable readout with high fidelity, however further improvements in sensitivity are required to meet the fidelity thresholds and measurement timescales needed for the implementation of fast-feedback in error correction protocols. Here, we combine radio-frequency gate-based sensing at 622 MHz with a Josephson parametric amplifier (JPA), that operates in the 500-800 MHz band, to reduce the integration time required to read the state of a silicon double quantum dot formed in a nanowire transistor. Based on our achieved signal-to-noise ratio (SNR), we estimate that singlet-triplet single-shot readout with an average fidelity of 99.7% could be performed in 1 $μ$s, well-below the requirements for fault-tolerant readout and 30 times faster than without the JPA. Additionally, the JPA allows operation at a lower RF power while maintaining identical SNR. We determine a noise temperature of 200 mK with a contribution from the JPA (25%), cryogenic amplifier (25%) and the resonator (50%), showing routes to further increase the read-out speed.

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Small-signal equivalent circuit for double quantum dots at low-frequencies

Due to the quantum nature of current flow in single-electron devices, new physical phenomena can manifest when probed at finite frequencies. Here, we present a semi-classical small-signal model approach to replace complex single-electron devices by linear parametric circuit components that could be readily used in analogue circuit simulators. Our approach is based on weakly-driven quantum two-level systems and here we use it to calculate the finite-frequency impedance of a single-electron double quantum dot (DQD). We find that the total impedance is composed by three elements that were previously considered separately: a dissipative term, corresponding to the Sisyphus resistance, and two dispersive terms, comprised of the quantum and tunneling capacitance. Finally, we combine the parametric terms to understand the interaction of the DQD with a slow classical electrical oscillator which finds applications in non-resonant state readout of quantum bits and parametric amplification.

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Gate-based single-shot readout of spins in silicon

Electron spins in silicon quantum dots provide a promising route towards realising the large number of coupled qubits required for a useful quantum processor. At present, the requisite single-shot spin qubit measurements are performed using on-chip charge sensors, capacitively coupled to the quantum dots. However, as the number of qubits is increased, this approach becomes impractical due to the footprint and complexity of the charge sensors, combined with the required proximity to the quantum dots. Alternatively, the spin state can be measured directly by detecting the complex impedance of spin-dependent electron tunnelling between quantum dots. This can be achieved using radio-frequency reflectometry on a single gate electrode defining the quantum dot itself, significantly reducing gate count and architectural complexity, but thus far it has not been possible to achieve single-shot spin readout using this technique. Here, we detect single electron tunnelling in a double quantum dot and demonstrate that gate-based sensing can be used to read out the electron spin state in a single shot, with an average readout fidelity of 73%. The result demonstrates a key step towards the readout of many spin qubits in parallel, using a compact gate design that will be needed for a large-scale semiconductor quantum processor.

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A CMOS dynamic random access architecture for radio-frequency readout of quantum devices

Quantum computing technology is maturing at a relentless pace, yet individual quantum bits are wired one by one. As quantum processors become more complex, they require efficient interfaces to deliver signals for control and readout while keeping the number of inputs manageable. Digital electronics offers solutions to the scaling challenge by leveraging established industrial infrastructure and applying it to integrate silicon-based quantum devices with conventional CMOS circuits. Here, we combine both technologies at milikelvin temperatures and demonstrate the building blocks of a dynamic random access architecture for efficient readout of complex quantum circuits. Our circuit is divided into cells, each containing a CMOS quantum dot (QD) and a field-effect transistor that enables selective readout of the QD, as well as charge storage on the QD gate similar to 1T-1C DRAM technology. We show dynamic readout of two cells by interfacing them with a single radio-frequency resonator. Our results demonstrate a path to reducing the number of input lines per qubit and enable addressing of large-scale device arrays.

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