Electrical Characterization of 180 nm ATLASPix2 HV-CMOS Monolithic Prototypes for the High-Luminosity LHC

Abstract

We report on the experimental study made on a successive prototype of High-Voltage CMOS (HV-CMOS) ATLASPix2 sensor for the tracking detector application, developed with 180 nm feature size. These sensors are to qualify mainly the peripheral data processing blocks (e.g. Command Decoder, Trigger Buffer, etc.). It is a smaller version of 24 X 36 pixelated sensor in comparison to the earlier generation of ATLASPix1 fabricated in both ams AG, Austria, and TSI Semiconductors, USA. While ams produced ATLASPix2 showed breakdown voltage 50 V in nonirradiated condition as it was seen on its predecessors ATLASpix1, TSI produced prototypes reported breakdown voltage greater than 100 V. The chosen wafer of MCz 20 Ohm.cm P-type substrate resistivity can deplete a few tenths of um, where the process-driven surface damage can have a greater impact on device operating conditions before and after irradiation. In an aim to understand device intrinsic performance at the irradiated case, a dedicated neutron irradiation campaign has been made at JSI for different fluences. Characterizations have been performed at different temperatures after irradiation to analyze the leakage current and breakdown voltage before and after irradiation. TSI prototypes showed a breakdown voltage decrease 90 V due to impact ionization and enhanced effective doping concentration. Results demonstrated for the neutron-irradiated devices up to the fluence of 2 X 10^15 neq/cm2 can still safely be operated at a voltage high enough to allow for high efficiency. Accelerated Annealing steps also made on selective irradiated ATLASPix2 samples, equivalent to more than two years of room-temperature annealing (at 20 degC), and they showed the reassuring expected breakdown voltage increase and damage constant rate alpha^* (geometry dependent) decrease, driven by the beneficial annealing.