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arXiv · 2009.00158

Development of a Low-noise Front-end ASIC for CdTe Detectors

Tenyo Kawamura·Tadashi Orita·Shin'ichiro Takeda·Shin Watanabe·Hirokazu Ikeda·Tadayuki Takahashi
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Abstract

We present our latest ASIC, which is used for the readout of Cadmium Telluride double-sided strip detectors (CdTe DSDs) and high spectroscopic imaging. It is implemented in a 0.35 um CMOS technology (X-Fab XH035), consists of 64 readout channels, and has a function that performs simultaneous AD conversion for each channel. The equivalent noise charge of 54.9 e- +/- 11.3 e- (rms) is measured without connecting the ASIC to any detectors. From the spectroscopy measurements using a CdTe single-sided strip detector, the energy resolution of 1.12 keV (FWHM) is obtained at 13.9 keV, and photons within the energy from 6.4 keV to 122.1 keV are detected. Based on the experimental results, we propose a new low-noise readout architecture making use of a slew-rate limited mode at the shaper followed by a peak detector circuit.

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Tenyo Kawamura, Tadashi Orita, Shin'ichiro Takeda, Shin Watanabe, Hirokazu Ikeda, Tadayuki Takahashi. 2020-09-01. Development of a Low-noise Front-end ASIC for CdTe Detectors. https://doi.org/10.1016/j.nima.2020.164575

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