Performance of small-diameter muon drift tube chambers with new fast readout ASIC at high background rates

Abstract

Experiments like ATLAS at the HL-LHC or detectors at future hadron colliders need muon detectors with excellent momentum resolution up to the TeV scale both at the trigger and offline reconstruction levels. This requires muon tracking chambers with high spatial resolution even at the highest background fluxes. Drift-tube chambers are the most cost-effective technology for large-area muon systems, providing the required high rate capability and three-dimensional spatial resolution. Thanks to advances in electronics, the new generation small-diameter Muon Drift Tube (sMDT) detectors with 15 mm tube diameter can be used in stand-alone mode up to the background rates expected at future hadron collider experiments, providing event times and second coordinates without additional trigger chambers. New developments in integrated front-end electronics include fast baseline restoration of the shaped signal and picosecond time-to-digital converters for second coordinate measurement with double-sided read-out. Self-triggered operation is now possible using modern high-performance FPGAs for real-time pattern recognition and track reconstruction. A new amplifier shaper discriminator chip in 65 nm TSMC CMOS technology with increased sensitivity and faster baseline recovery has been developed to cope with high background fluxes. Extensive test beam campaigns using sMDT chambers with new readout electronics have been performed at the CERN Gamma Irradiation Facility (GIF++). Results show that the shorter peaking time of the new chip enhances the spatial resolution of the drift tubes by up to 100 $\mu$m at a background rate of 1 MHz, the maximum rate expected at the 100 TeV collider experiment.