arXiv subjects

Simon Spannagel

Publications and source records attributed to Simon Spannagel.

At least 19 recordsLinked to original sources

arXiv2026

Characterization of Passive CMOS Strip Detectors After Proton Irradiation

Strip detectors are populating outer trackers of high-energy particle experiments. They are convenient for covering large areas of sensitive material since they use less power and have fewer readout channels compared to pixels sensors. Nevertheless, they are typically manufactured with a mask set that covers the full wafer, otherwise when using smaller reticles the strip implants have to be stitched. For this project, strip detectors were fabricated in a CMOS commercial foundry using different reticles to be stitched several times, proving the feasibility of this technology. LFoundry produced the passive CMOS strip detector with a production line of 150 nm node technology, using a 150 um thick FZ wafer. Those strip sensors have three different geometries to study different impacts of the CMOS technology. The strips have lengths of 2.1 cm and 4.1 cm, stitching 3 or 5 reticles respectively. This work shows results of 24 GeV proton irradiated passive CMOS strip detectors. The detectors were irradiated at CERN and were tested with different set-ups, not showing any effect from the strips stitching. Proving that this technology is feasible for detecting high-energy particles opens the door to future large productions of passive strip detectors and also to produce active strip sensors in commercial CMOS foundries.

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arXiv2026

Review of prototypes developed in a 65 nm CMOS imaging technology in view of vertexing applications at a future lepton collider

The OCTOPUS project addresses the development and characterization of monolithic active pixel sensors in the TPSCo 65 nm ISC technology in view of vertexing applications at a future lepton collider. Meeting the corresponding requirements -- outlined in the ECFA detector road map -- will necessitate the simulation, design, and testing of prototypes and a demonstrator chip in this very process. This work reviews the literature on existing prototypes, summarizing their design characteristics, properties, and performance in charged-particle detection, and provides an overview of previous simulation efforts. The presented results suggest the feasibility of the endeavor while showcasing challenges, the need for further investigations, and providing a foundation for imminent design choices.

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arXiv2026

Constellation: The Autonomous Control and Data Acquisition System for Dynamic Experimental Setups

The operation of instruments and detectors in laboratory or beamline environments presents a complex challenge, requiring stable operation of multiple concurrent devices, often controlled by separate hardware and software solutions. These environments frequently undergo modifications, such as the inclusion of different auxiliary devices depending on the experiment or facility, adding further complexity. The successful management of such dynamic configurations demands a flexible and robust system capable of controlling data acquisition, monitoring experimental setups, enabling seamless reconfiguration, and integrating new devices with limited effort. This paper presents Constellation, a flexible and network-distributed control and data acquisition software framework tailored to laboratory and beamline environments, that addresses the limitations of existing solutions. The framework is designed with a focus on extensibility, providing a streamlined interface for instrument integration. It supports efficient system setup via network discovery mechanisms, promotes stability through autonomous operational features, and provides comprehensive documentation and supporting tools for operators and application developers such as controllers and logging interfaces. At the core of the architectural design is the autonomy of the individual components, called satellites, which can make independent decisions about their operation and communicate these decisions to other components. This paper introduces the design principles and framework architecture of Constellation, presents the available graphical user interfaces, shares insights from initial successful deployments, and provides an outlook on future developments and applications.

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arXiv2025

Advancements and future expansions of the Caribou DAQ system

Caribou is a versatile data acquisition (DAQ) system developed within several collaborative frameworks (CERN EP R&D, DRD3, AIDAinnova, and Tangerine) to support laboratory and test-beam characterization of novel silicon pixel detectors. It combines a custom Control and Readout (CaR) board with a Xilinx Zynq System-on-Chip (SoC) running project-wide shared firmware and software stacks. The system architecture emphasizes reusability, flexibility, and ease of integration. The CaR board provides essential interfaces such as programmable power supplies, voltage and current references, high-speed ADCs, and configurable I/O lines for detector control and readout. The SoC runs an embedded Linux distribution built with PetaLinux and integrates two main components: Peary, a C++ embedded DAQ application providing hardware abstraction, configuration management, logging, and multi-device control through Command Line (CLI) and Python interfaces; and Boreal, a common Caribou FPGA firmware framework offering reusable modules and automated build workflows for user-specific bit files. The next major milestone in Caribou's evolution is the transition to version 2.0, based on a Zynq UltraScale+ System-on-Module (SoM) architecture. This paper presents the recent progress and future prospects of the project and describes recent hardware, firmware, and software developments preparing the system for the upcoming CaR board v2.0.

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arXiv2025

Characterization of the H2M Monolithic CMOS Sensor

The H2M (Hybrid-to-Monolithic) is a monolithic pixel sensor manufactured in a modified \SI{65}{\nano\meter}~CMOS imaging process with a small collection electrode. Its design addresses the challenges of porting an existing hybrid pixel detector architecture into a monolithic chip, using a digital-on-top design methodology, and developing a compact digital cell library. Each square pixel integrates an analog front-end and digital pulse processing with an 8-bit counter within a \SI{35}{\micro\meter}~pitch. This contribution presents the performance of H2M based on laboratory and test beam measurements, including a comparison with analog front-end simulations in terms of gain and noise. A particular emphasis is placed on backside thinning in order to reduce material budget, down to a total chip thickness of \SI{21}{\micro\meter} for which no degradation in MIP detection performance is observed. For all investigated samples, a MIP detection efficiency above \SI{99}{\%} is achieved below a threshold of approximately 205 electrons. At this threshold, the fake-hit rate corresponds to a matrix occupancy of fewer than one pixel per the \SI{500}{\nano\second}~frame. Measurements reveal a non-uniform in-pixel response, attributed to the formation of local potential wells in regions with low electric field. A simulation flow combining technology computer-aided design, Monte Carlo, and circuit simulations is used to investigate and describe this behavior, and is applied to develop mitigation strategies for future chip submissions with similar features.

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arXiv2025

Timing performance of a digital SiPM prototype measured with a picosecond injection laser

The DESY digital silicon photomultiplier (dSiPM) is a monolithic detector based on complementary metal-oxide-semiconductor (CMOS) single-photon avalanche diodes (SPADs) and features a fully digital readout. The dSiPM prototype was characterized using a picosecond injection laser. Different contributions to the time resolution from both SPADs and digitization electronics are quantified. The dSiPM achieves a temporal resolution of approximately 50 ps under optimal conditions, while localized charge deposition with the laser revealed in-pixel variations of the time resolution linked to the SPAD layout. Combining fast timing with a pixelated readout, the device is a promising candidate for 4D-tracking detectors and other precision timing applications.

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arXiv2025

Impact of the circuit layout on the charge collection in a monolithic pixel sensor

CERN's strategic R&D programme on technologies for future experiments recently started investigating the TPSCo 65nm ISC CMOS imaging process for monolithic active pixels sensors for application in high energy physics. In collaboration with the ALICE experiment and other institutes, several prototypes demonstrated excellent performance, qualifying the technology. The Hybrid-to-Monolithic (H2M), a new test-chip produced in the same process but with a larger pixel pitch than previous prototypes, exhibits an unexpected asymmetric efficiency pattern. This contribution describes a simulation procedure combining TCAD, Monte Carlo and circuit simulations to model and understand this effect. It proved able to reproduce measurement results and attribute the asymmetric efficiency drop to a slow charge collection due to low amplitude potential wells created by the circuitry layout and impacting efficiency via ballistic deficit.

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arXiv2025

The H2M Monolithic Active Pixel Sensor -- characterizing non-uniform in-pixel response in a 65 nm CMOS imaging technology

The high energy physics community recently gained access to the TPSCo 65 nm ISC (Image Sensor CMOS), which enables a higher in-pixel logic density in monolithic active pixel sensors (MAPS) compared to processes with larger feature sizes. To explore this novel technology, the Hybrid-to-Monolithic (H2M) test chip has been designed and manufactured. The design followed a digital-on-top design workflow and ports a hybrid pixel-detector architecture, with digital pulse processing in each pixel, into a monolithic chip. The chip matrix consists of 64$\times$16 square pixels with a size of 35$\times$35 um2, and a total active area of approximately 1.25 um2. The chip has been successfully integrated into the Caribou DAQ system. It is fully functional, and the measured threshold dispersion and noise agree with the expectation from front-end simulations. However, a non-uniform in-pixel response related to the size and location of the n-wells in the analog circuitry has been observed in test beam measurements and will be discussed in this contribution. This asymmetry in the pixel response, enhanced by the 35 um pixel pitch - larger than in other prototypes - and certain features of the readout circuit, has not been observed in prototypes with smaller pixel pitches in this technology.

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arXiv2025

Transient studies using a TCAD and Allpix Squared combination approach

The goal of the TANGERINE project is to develop the next generation of monolithic silicon pixel detectors using a 65 nm CMOS imaging process, which offers a higher logic density and overall lower power consumption compared to previously used processes. A combination of Technology Computer-Aided Design (TCAD) and Monte Carlo (MC) simulations is used to understand the physical processes within the sensing element and thus the overall performance of the pixel detector. The response of the sensors can then be tested in laboratory and test beam facilities and compared to simulation results. Transient simulations allow for studying the response of the sensor as a function of time, such as the signal produced after a charged particle passes through the sensor. The study of these signals is important to understand the magnitude and timing of the response from the sensors and improve upon them. While TCAD simulations are accurate, the time required to produce a single pulse is large compared to a combination of MC and TCAD simulations. In this work, a validation of the transient simulation approach and studies on charge collection are presented.

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arXiv2025

Caribou - A versatile data acquisition system for silicon pixel detector prototyping

Caribou is a versatile data acquisition system used in multiple collaborative frameworks (CERN EP R&D, DRD3, AIDAinnova, Tangerine) for laboratory and test-beam qualification of novel silicon pixel detector prototypes. The system is built around a common hardware, firmware and software stack shared accross different projects, thereby drastically reducing the development effort and cost. It consists of a custom Control and Readout (CaR) board and a commercial Xilinx Zynq System-on-Chip (SoC) platform. The SoC platform runs a full Yocto distribution integrating the custom software framework (Peary) and a custom FPGA firmware built within a common firmware infrastructure (Boreal). The CaR board provides a hardware environment featuring various services such as powering, slow-control, and high-speed data links for the target detector prototype. Boreal and Peary, in turn, offer firmware and software architectures that enable seamless integration of control and readout for new devices. While the first version of the system used a SoC platform based on the ZC706 evaluation board, migration to a Zynq UltraScale+ architecture is progressing towards the support of the ZCU102 board and the ultimate objective of integrating the SoC functionality directly into the CaR board, eliminating the need for separate evaluation boards. This paper describes the Caribou system, focusing on the latest project developments and showcasing progress and future plans across its hardware, firmware, and software components.

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arXiv2024

Test Beam Characterization of a Digital Silicon Photomultiplier

Conventional silicon photomultipliers (SiPMs) are well established as light detectors with single-photon-detection capability and used throughout high energy physics, medical, and commercial applications. The possibility to produce single photon avalanche diodes (SPADs) in commercial CMOS processes creates the opportunity to combine a matrix of SPADs and an application-specific integrated circuit in the same die. The potential of such digital SiPMs (dSiPMs) is still being explored, while it already is an established technology in certain applications, like light detection and ranging (LiDAR). A prototype dSiPM, produced in the LFoundry 150-nm CMOS technology, was designed and tested at DESY. The dSiPM central part is a matrix of 32 by 32 pixels. Each pixel contains four SPADs, a digital front-end, and has an area of 69.6 $\times$ 76 um$^2$. The chip has four time-to-digital converters and includes further circuitry for data serialization and data links. This work focuses on the characterization of the prototype in an electron beam at the DESY II Test Beam facility, to study its capability as a tracking and timing detector for minimum ionizing particles (MIPs). The MIP detection efficiency is found to be dominated by the fill factor and on the order of 31 %. The position of the impinging MIPs can be measured with a precision of about 20 um, and the time of the interaction can be measured with a precision better than 50 ps for about 85 % of the detected events. In addition, laboratory studies on the breakdown voltage, dark count rate, and crosstalk probability, as well as the experimental methods required for the characterization of such a sensor type in a particle beam are presented.

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arXiv2024

electronCT -- An Imaging Technique Using Very-high Energy Electrons

The electronCT technique is an imaging method based on the multiple Coulomb scattering of relativistic electrons and has potential applications in medical and industrial imaging. It utilizes a pencil beam of electrons in the very high energy electron (VHEE, 50-250 MeV) range and a single detection layer for the determination of the beam profile. The technique constitutes a projectional, two-dimensional imaging method and thus also qualifies for the tomographic reconstruction of samples. Given the simplicity of the technical setup and its location behind the sample, the electronCT technique has potential synergies with VHEE radiotherapy, making use of the same electron source for both treatment and diagnostics and thus being a candidate for in-situ imaging and patient localization. At the same time, several technical challenges arise from the measurement technique when applied for the imaging of living beings. Measurements performed at the ARES linear particle accelerator at an electron energy of 155 MeV using a mouse phantom and a Timepix3 silicon pixel detector assembly demonstrate the feasibility of this technique. Both projectional and tomographic reconstructions are presented and the potential and limits of the technology are discussed.

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arXiv2024

TCAD Simulation of Stitching for Passive CMOS Strip Detectors

Most of the tracking detectors for high energy particle experiments are filled with silicon detectors since they are radiation hard, they can give very small spatial resolution and they can take advantage of the silicon electronics foundries developments and production lines. Strip detectors are very useful to cover large areas for tracking purposes, while consuming less power per area compared to pixel sensors. The majority of particle physics experiments use conventional silicon strip detectors fabricated in foundries that do not use stitching, relying on a very small number of foundries worldwide that can provide large amounts of strip detectors. Fabricating strip detectors in a CMOS foundry opens the possibility to use more foundries and to include active elements in the strips for future productions. For the passive CMOS strip detectors project we fabricated strip detectors in a CMOS foundry using two 1 cm2 reticles that are stitched together along the wafer. The fabricated strips stitched the reticles three and five times, and it was shown that the performance of those strips is not affected by the stitching. This paper shows 3D TCAD simulations of the stitching area to investigate the possible effects stitching can have on the performance of the strip detectors, considering different stitching mismatches. We will show that the mismatch of stitched structures up to 1 um does not impact the performance with TCAD simulations which agrees with the results obtained from the measurements.

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arXiv2024

4D-Tracking with Digital SiPMs

Silicon Photomultipliers (SiPMs) are the state-of-the-art technology in single-photon detection with solid-state detectors. Single Photon Avalanche Diodes (SPADs), the key element of SiPMs, can now be manufactured in CMOS processes, facilitating the integration of a SPAD array into custom monolithic ASICs. This allows implementing features such as signal digitization, masking, full hit-map readout, noise suppression, and photon counting in a monolithic CMOS chip. The complexity of the off-chip readout chain is thereby reduced. These new features allow new applications for digital SiPMs, such as 4D-tracking of charged particles, where spatial resolutions of the order of $10 \mu m$ and timestamping with time resolutions of a few tens of ps are required. A prototype of a digital SiPM was designed at DESY using the LFoundry $150 nm$ CMOS technology. Various studies were carried out in the laboratory and at the DESY II test-beam facility to evaluate the sensor performance in Minimum Ionizing Particles (MIPs) detection. The direct detection of charged particles was investigated for bare prototypes and assemblies coupling dSiPMs and thin LYSO crystals. Spatial resolution $\sim20 \mu m$ and a full-system time resolution of $\sim50 ps$ are measured using bare dSiPMs in direct MIP detection. Efficiency $>99.5 \%$, low noise rate and time resolution $<1 ns$ can be reached with the thin radiator coupling.

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arXiv2024

Simulating Monolithic Active Pixel Sensors: A Technology-Independent Approach Using Generic Doping Profiles

The optimisation of the sensitive region of CMOS sensors with complex non-uniform electric fields requires precise simulations, and this can be achieved by a combination of electrostatic field simulations and Monte Carlo methods. This paper presents the guiding principles of such simulations, using a CMOS pixel sensor with a small collection electrode and a high-resistivity epitaxial layer as an example. The full simulation workflow is described, along with possible pitfalls and how to avoid them. For commercial CMOS processes, detailed doping profiles are confidential, but the presented method provides an optimisation tool that is sufficiently accurate to investigate sensor behaviour and trade-offs of different sensor designs without knowledge of proprietary information. The workflow starts with detailed electric field finite element method simulations in TCAD, using generic doping profiles. Examples of the effect of varying different parameters of the simulated sensor are shown, as well as the creation of weighting fields, and transient pulse simulations. The fields resulting from TCAD simulations can be imported into the Allpix Squared Monte Carlo simulation framework, which enables high-statistics simulations, including modelling of stochastic fluctuations from the underlying physics processes of particle interaction. Example Monte Carlo simulation setups are presented and the different parts of a simulation chain are described. Simulation studies from small collection electrode CMOS sensors are presented, and example results are shown for both single sensors and multiple sensors in a test beam telescope configuration. The studies shown are those typically performed on sensor prototypes in test beam campaigns, and a comparison is made to test beam data, showing a maximum deviation of 4% and demonstrating that the approach is viable for generating realistic results.

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arXiv2024

Characterisation and simulation of stitched CMOS strip sensors

In high-energy physics, there is a need to investigate alternative silicon sensor concepts that offer cost-efficient, large-area coverage. Sensors based on CMOS imaging technology present such a silicon sensor concept for tracking detectors. The CMOS Strips project investigates passive CMOS strip sensors fabricated by LFoundry in a 150nm technology. By employing the technique of stitching, two different strip sensor formats have been realised. The sensor performance is characterised based on measurements at the DESY II Test Beam Facility. The sensor response was simulated utilising Monte Carlo methods and electric fields provided by TCAD device simulations. This study shows that employing the stitching technique does not affect the hit detection efficiency. A first look at the electric field within the sensor and its impact on generated charge carriers is being discussed.

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arXiv2024

Characterisation of analogue Monolithic Active Pixel Sensor test structures implemented in a 65 nm CMOS imaging process

Analogue test structures were fabricated using the Tower Partners Semiconductor Co. CMOS 65 nm ISC process. The purpose was to characterise and qualify this process and to optimise the sensor for the next generation of Monolithic Active Pixels Sensors for high-energy physics. The technology was explored in several variants which differed by: doping levels, pixel geometries and pixel pitches (10-25 $μ$m). These variants have been tested following exposure to varying levels of irradiation up to 3 MGy and $10^{16}$ 1 MeV n$_\text{eq}$ cm$^{-2}$. Here the results from prototypes that feature direct analogue output of a 4$\times$4 pixel matrix are reported, allowing the systematic and detailed study of charge collection properties. Measurements were taken both using $^{55}$Fe X-ray sources and in beam tests using minimum ionizing particles. The results not only demonstrate the feasibility of using this technology for particle detection but also serve as a reference for future applications and optimisations.

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arXiv2024

Simulations and Performance Studies of a MAPS in 65 nm CMOS Imaging Technology

Monolithic active pixel sensors (MAPS) produced in a 65 nm CMOS imaging technology are being investigated for applications in particle physics. The MAPS design has a small collection electrode characterized by an input capacitance of ~fF, granting a high signal-to-noise ratio and low power consumption. Additionally, the 65 nm CMOS imaging technology brings a reduction in material budget and improved logic density of the readout circuitry, compared to previously studied technologies. Given these features, this technology was chosen by the TANGERINE project to develop the next generation of silicon pixel sensors. The sensor design targets temporal and spatial resolutions compatible with the requirements for a vertex detector at future lepton colliders. Simulations and test-beam characterization of technology demonstrators have been carried out in close collaboration with the CERN EP R&D program and the ALICE ITS3 upgrade. TCAD device simulations using generic doping profiles and Monte Carlo simulations have been used to build an understanding of the technology and predict the performance parameters of the sensor. Technology demonstrators of a 65 nm CMOS MAPS with a small collection electrode have been characterized in laboratory and test-beam facilities by studying performance parameters such as cluster size, charge collection, and efficiency. This work compares simulation results to test-beam data. The experimental results establish this technology as a promising candidate for a vertex detector at future lepton colliders and give valuable information for improving the simulation approach.

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