Characterization of a 28 nm $\textit{smartpixels}$ ASIC With On-Chip ML for Particle Tracking Detectors

Abstract

We present a 28 nm CMOS pixel readout integrated circuit implementing in-pixel analog signal processing and on-chip machine learning data filtering for particle tracking detectors. Our ASIC comprises two $32 \times 8$ pixel matrices with a pixel pitch of $25 \times 25~\mu\mathrm{m}^2$, in which each pixel integrates a charge-sensitive amplifier with synchronous auto-zero offset cancellation and a 2-bit flash ADC with programmable thresholds. Two analog front-end architectures, single-ended and differential, are implemented and characterized. Digitized pixel data are combined into row-wise projections and processed by an on-chip, fully combinational neural network classifier for data reduction. Measurements at room temperature using charge injection demonstrate an equivalent noise charge of $54.6~\mathrm{e}^{-}$ and a threshold dispersion of $\sim$78.2~\unit{\electron} at nominal bias, linear response up to several~\unit{\kilo\electron}, and stable operation at a 10~MHz clock frequency. The neural network output is compared with offline RTL predictions and agrees for $99.06\%$ of $1.5 \times 10^{5}$ test inputs.