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Shubin Liu

Publications and source records attributed to Shubin Liu.

At least 19 recordsLinked to original sources

A mobile high spatial-resolution Muography instrument based on large-area Micromegas detectors

Muon radiography is an imaging technique based on muon absorption in matter that allows measurement of internal details in hidden objects or structures. This technique relies on measuring cosmic-ray muons tracks accurately, which reflects the incoming muon flux from both the target object and the open sky. In this paper, we report on the construction of a high spatial resolution muography instrument based on Micromegas detectors. Using four layers of 400 mm ${\times}$ 400 mm Micromegas detectors, channel multiplexing circuits, and the versatile readout system, a moveable muography instrument named $μ$STC-R400 was designed and constructed. Results show that the channel multiplexing circuits can resolve hit positions correctly, and the spatial resolution of the detector is approximately 190 $μ$m. Experiments were conducted at an under-construction subway tunnel and outdoors near a mountain, demonstrating the $μ$STC-R400's ability to maintain high spatial resolution outside the laboratory and its robustness in harsh environments.

physics.ins-det

The development of a high granular crystal calorimeter prototype of VLAST

Very Large Area gamma-ray Space Telescope (VLAST) is the next-generation flagship space observatory for high-energy gamma-ray detection proposed by China. The observation energy range covers from MeV to TeV and beyond, with acceptance of 10 m^2sr. The calorimeter serves as a crucial subdetector of VLAST, responsible for high-precision energy measurement and electron/proton discrimination. This discrimination capability is essential for accurately identifying gamma-ray events among the background of charged particles. To accommodate such an extensive energy range, a high dynamic range readout scheme employing dual avalanche photodiodes (APDs) has been developed, achieving a remarkable dynamic range of 10^6. Furthermore, a high granular prototype based on bismuth germanate (BGO) cubic scintillation crystals has been developed. This high granularity enables detailed imaging of the particle showers, improving both energy resolution and particle identification. The prototype's performance is evaluated through cosmic ray testing, providing valuable data for optimizing the final calorimeter design for VLAST.

physics.ins-det

A High Compression Ratio Channel Multiplexing Method for Micro-pattern Gaseous Detectors

The demand for a large number of readout channels has been a limiting factor for the application of Micro-pattern Gaseous Detectors (MPGDs) in achieving higher spatial resolution and larger detection areas. This challenge is further compounded by issues related to system integration, power consumption, and cost efficiency. To address these challenges, this study proposes two novel multiplexing methods based on Eulerian circuits. Mathematical calculations indicate that with $n$ electronics channels, up to $n \times (n-1)/2 - (n - 2)/2 + 1$ detector channels can be read out, where $n$ is even. Three types of multiplexing circuits were designed, implemented, and tested in combination with Micromegas detectors. Experimental results demonstrate that, for a multiplexing circuit with a factor of 8, the spatial resolution remains comparable to the direct readout method, while achieving a detection efficiency exceeding 94\%. For a circuit with a multiplexing factor of 16, although the spatial resolution shows a slight degradation, the detection efficiency remains above 93.6\%. These results demonstrate that the proposed multiplexing methods can significantly reduce the number of readout channels while maintaining an acceptable level of spatial resolution and detection efficiency. These findings highlight the potential of the proposed multiplexing techniques for applications in fields requiring high-resolution and cost-effective detector systems, such as cosmic-ray muon imaging.

physics.ins-det

A Compact Readout Electronics Based on Current Amplifier for Micromegas Detector in Muon Imaging

Muon imaging technology is an innovative imaging technique that can be applied in volcano imaging, heavy nuclear material detection, and archaeological research. The Micromegas detector is a promising choice for muon imaging due to its high spatial resolution and large area. However, the large number of readout channels poses a challenge for electronics. In this paper, a compact front-end electronics (FEE) for reading Micromegas detectors is presented. The electronics use the commercial current-to-digital readout chip, ADAS1128, which integrates 128 current amplifiers for multi-channel charge measurement. After verifying the basic performance of the electronics, the energy resolution was obtained with a radioactive source. Furthermore, a muon imaging system prototype was set up and its spatial resolution was evaluated in a test with cosmic ray muons. The system prototype can reconstruct the boundaries of sufficiently massive objects with a size of 2 cm in a scattering imaging test.

physics.ins-det

A Back-End Electronics Based on Fiber Communication for Small to Medium-Scale Physics Experiments

Many small and medium-sized physics experiments are being conducted worldwide. These experiments have similar requirements for readout electronics, especially the back-end electronics. Some experiments need a trigger logic unit(TLU) to provide timing and synchronous control signals. This paper introduces a back-end electronics design for small and medium-sized physics experiments; it adopts a daughter-motherboard structure integrated TLU function to provide greater flexibility. Different interfaces and protocols can be flexibly selected according to data bandwidth requirements. It supports 32 optical fiber interfaces based on a field-programmable gate array (FPGA) of normal IOs with 400Mbps of data bandwidth for each channel. At the same time, it supports 16 high-speed communication interfaces based on GTX port with several Gbps data bandwidth of each channel. For the TLU function, this design has 8 HDMI interfaces and one RJ45 interface to provide synchronous triggers and other control signals, and it has six analog LEMOs and four digital LEMOs to accept asynchronous signals from an external source. These design specifications can meet the needs of most small and medium-sized experiments. This set of back-end electronics has been successfully used in experiments such as PandaX-III, VLAST, and moungraphy. Moreover, it has successfully conducted beam tests with a readout of the data of VLAST detectors at CERN.

physics.ins-det

A low dead time, resource efficient encoding method for FPGA based high-resolution TDL TDCs

This paper presents a novel encoding method for fine time data of a tapped delay line (TDL) time-to-digital Converter (TDC). It is based on divide-and-conquer strategy, and has the advantage of significantly reducing logic resource utilization while retaining low dead-time performance. Furthermore, the problem of high bubble depth in advanced devices can be resolved with this method. Four examples are demonstrated, which were implemented in a Xilinx Artix-7 Field Programmable Gate Array (FPGA) device, and encoding method presented in this paper was employed to encode fine time data for normal TDL TDC, a half-length delay line TDC, and double-edge and four-edge wave union TDCs. Compared with TDCs from the latest published papers that adopt traditional encoders, the logic utilization of TDCs in this paper were reduced by a factor of 45% to 70% in different situations, while the encoding dead time can be restricted in one clock cycle. Acceptable resolutions of the demonstrated TDCs were also obtained, proving the functionality of the encoding method.

physics.space-ph

FPGA-based electronic system for the control and readout of superconducting quantum processors

Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit (SQC) technology, synchronization in a large-scale system, low-latency execution, and low noise are required for electronic systems. Here, we present a field-programmable gate array (FPGA)-based electronic system with a distributed synchronous clock and trigger architecture. The system supports synchronous control of qubits with jitters of approximately 5 ps. We implement a real-time digital signal processing system in the FPGA, enabling precise timing control, arbitrary waveform generation, IQ demodulation for qubit state discrimination, and the generation of real-time qubit-state-dependent trigger signals for feedback/feedforward control. The hardware and firmware low-latency design reduces the feedback/feedforward latency of the electronic system to 125 ns, significantly less than the decoherence times of the qubit. Finally, we demonstrate the functionalities and low-noise performance of this system using a fluxonium quantum processor.

quant-ph

A High Spatial Resolution Muon Tomography Prototype System based on Micromegas Detector

Cosmic ray muon has strong penetrating power and no ionizing radiation hazards, which makes it an ideal probe for detecting special nuclear materials. In this paper, a high spatial resolution muon tomography system based on Micromegas detectors is proposed to optimize the imaging time and quality. The proposed system includes eight Micromegas detectors based on the thermal bonding technique and a scalable readout system. In addition, a multiplexing method based on position encoding is developed to reduce the number of electronics channels by order of magnitude. The spatial resolution of the proposed system with encoding readout can reach a value of hundred micrometers. Finally, a tomography test is performed, and test results show that this proposed system can image 2-cm objects and distinguish different materials.

physics.ins-det

Measurement of the neutron beam profile of the Back-n white neutron facility at CSNS with a Micromegas detector

The Back-n white neutron beam line, which uses back-streaming white neutrons from the spallation target of the China Spallation Neutron Source, is used for nuclear data measurements. A Micromegas-based neutron detector with two variants was specially developed to measure the beam spot distribution for this beam line. In this article, the design, fabrication, and characterization of the detector are described. The results of the detector performance tests are presented, which include the relative electron transparency, the gain and the gain uniformity, and the neutron beam profile reconstruction capability. The result of the first measurement of the Back-n neutron beam spot distribution is also presented.

physics.ins-det

Measurements of differential and angle-integrated cross sections for the $^{10}$B($n, α$)$^{7}$Li reaction in the neutron energy range from 1.0 eV to 2.5 MeV

Differential and angle-integrated cross sections for the $^{10}$B($n, α$)$^{7}$Li, $^{10}$B($n, α$$_{0}$)$^{7}$Li and $^{10}$B($n, α$$_{1}$)$^{7}$Li$^{*}$ reactions have been measured at CSNS Back-n white neutron source. Two enriched (90%) $^{10}$B samples 5.0 cm in diameter and ~85.0 $μ$g/cm$^{2}$ in thickness each with an aluminum backing were prepared, and back-to-back mounted at the sample holder. The charged particles were detected using the silicon-detector array of the Light-charged Particle Detector Array (LPDA) system. The neutron energy E$_{n}$ was determined by TOF (time-of-flight) method, and the valid $α$ events were extracted from the E$_{n}$-Amplitude two-dimensional spectrum. With 15 silicon detectors, the differential cross sections of $α$-particles were measured from 19.2° to 160.8°. Fitted with the Legendre polynomial series, the ($n, α$) cross sections were obtained through integration. The absolute cross sections were normalized using the standard cross sections of the $^{10}$B($n, α$)$^{7}$Li reaction in the 0.3 - 0.5 MeV neutron energy region. The measurement neutron energy range for the $^{10}$B($n, α$)$^{7}$Li reaction is 1.0 eV $\le$ En < 2.5 MeV (67 energy points), and for the $^{10}$B($n, α$$_{0}$)$^{7}$Li and $^{10}$B($n, α$$_{1}$)$^{7}$Li$^{*}$ reactions is 1.0 eV $\le$ En < 1.0 MeV (59 energy points). The present results have been analyzed by the resonance reaction mechanism and the level structure of the $^{11}$B compound system, and compared with existing measurements and evaluations.

nucl-ex

Research into the sampling methods of digital beam position measurement

BPM (Beam Position Measurement) system is one of the most important beam diagnostic instruments in accelerators. A fully digital BPM (DBPM) has been designed for SSRF (Shanghai Synchrotron Radiation Facility). As Analog-to-Digital Converter (ADC) is one crucial part in the DBPM system, the sampling methods should be studied to achieve optimum performance. We implemented different sampling modes and compared them through tests. Meanwhile, long term variation among four sampling channels is another concern, which would introduce errors in beam position measurement. We designed an interleaved distribution scheme to address this issue. To evaluate these sampling methods, we conducted commissioning tests with the beam in SSRF. Test results indicate that with proper sampling methods, a turn-by-turn (TBT) position resolution better than 1 um is achieved, and the slow-acquisition (SA) position resolution is enhanced from 4.28 μm to 0.17 μm successfully with interleaved distribution applied, both beyond requirement.

physics.ins-det

Real-Time FPGA-based Digital Signal Processing and Correction for a Small Animal PET

Small animal Positron Emission Tomography (PET) is dedicated to small animal imaging, which requires high position and energy precision, as well as good flexibility and efficiency of the electronics. This paper presents the design of a digital signal processing logic for a marmoset brain PET system based on LYSO crystal arrays, SiPMs, and the resistive network readout method. We implement 32-channel signal processing in a single Xilinx Artix-7 Field-Programmable Gate Array (FPGA). The logic is designed to support four online modes which are regular data processing mode, flood map construction mode, energy spectrum construction mode, and raw data mode. Several functions are integrated, including two-dimensional (2D) raw position calculation, crystal locating, events filtering, and synchronization detection. Furthermore, a series of online corrections is also integrated, such as photon peak correction to 511 keV and time measurement result correction with crystal granularity. A Gigabit Ethernet interface is utilized for data transfer, Look-Up Tables (LUTs) configuration, and command issuing. The pipeline logic works at 125 MHz with a signal processing capability beyond the required data rate of 1,000,000 events/s/channel. A series of initial tests are conducted. The results indicate that the logic design meets the application requirement.

physics.ins-det

A multichannel front end ASIC for PMT readout in LHAASO WCDA

Time and charge measurements over a large dynamic range from 1 Photo Electron (P.E.) to 4000 P.E. are required for the Water Cherenkov Detector Array (WCDA), which is one of the key components in the Large High Altitude Air Shower Observatory (LHAASO). To simplify the circuit structure of the readout electronics, a front end ASIC was designed. Based on the charge-to-time conversion method, the output pulse width of the ASIC corresponds to the input signal charge information while time information of the input signal is picked off through a discriminator, and thus the time and charge information can be digitized simultaneously using this ASIC and a following Time-to-Digital Converter (TDC). To address the challenge of mismatch among the channels observed in the previous prototype version, this work presents approaches for analyzing the problem and optimizing the circuits. A new version of the ASIC was designed and fabricated in the GLOBALFOUNDRIES 0.35 um CMOS technology, which integrates 6 channels (corresponding to the readout of the 3 PMTs) in each chip. The test results indicate that the mismatch between the channels is significantly reduced to less than 20% using the proposed approach. The time measurement resolution better than 300 ps is achieved, and the charge measurement resolution is better than 10% at 1 P.E., and 1% at 4000 P.E., which meets the application requirements.

physics.ins-det

Prototype design of singles processing unit for the small animal PET

Position Emission Tomography (PET) is an advanced clinical diagnostic imaging technique for nuclear medicine. Small animal PET is increasingly uesd for studying the animal model of disease, new drugs and new therapies. A prototype of Singles Processing Unit (SPU) for a small animal PET system was designed to obtain the time, energy, and position information. The energy and position is actually calculated through high precison charge measurement, which is based on amplification, shaping, A/D conversion and area calculation in digital signal processing domian. Analysis and simulations were also conducted to optimize the key parameters in system design. Initial tests indicate that the charge and time precision is better than 0.3% FWHM and 350 ps FWHM respectively, while the position resolution is better than 0.35% FWHM. Commination tests of the SPU prototype with the PET detector indicate that the system time precision is better than 2.5 ns, while the flood map and energy spectra concored well with the expected.

physics.ins-det

A Time-to-Digital Converter-based Correction Method for Charge Measurement through Area Integration

A high-precision charge measurement can be achieved by the area integration of a digitized quasi-Gaussian signal after the signal passes through the shaper and analog-to-digital converter (ADC). The charge measurement contains an error due to the uncertainty of the first sampled point of a signal waveform. To reduce the error, we employ a time-to-digital converter (TDC) to measure the uncertainty precisely, and we design correction algorithms to improve the resolution of the charge measurement. This work includes analysis and simulations of the proposed algorithms and implementation of them in an FPGA device. Besides, the tests are also conducted to evaluate the performance of the correction method. Test results indicate that the resolution of the charge measurement is successfully improved from 0.231% to 0.126% by using a signal from the shaping circuit (with the amplitude of 2 V, and leading and trailing edges of about 80 ns and 280 ns, respectively) digitized at the sampling rate of 62.5 Msps.

physics.ins-det

Real-Time Phase Correction based on FPGA in the Beam Position and Phase Measurement System

A fully digital beam position and phase measurement (BPPM) system was designed for the linear accelerator (LINAC) in Accelerator Driven Sub-critical System (ADS) in China. Phase information is obtained from the summed signals from four pick-ups of the Beam Position Monitor (BPM). Considering that the delay variations of different analog circuit channels would introduce phase measurement errors, we propose a new method to tune the digital waveforms of four channels before summation and achieve real-time error correction. The process is based on the vector rotation method and implemented within one single Field Programmable Gate Array (FPGA) device. Tests were conducted to evaluate this correction method and the results indicate that a phase correction precision better than +/- 0.3 degree over the dynamic range from -60 dBm to 0 dBm is achieved.

physics.ins-det

Readout Electronics of T0 Detector in the External Target Experiment of CSR in HIRFL

T0 detector, based on Multi-gap Resistive Plate Chambers (MRPC) technology, is one of the key components in the External Target Experiment. Through precision measurements of the MRPC signals, timing of the beam impact on target can be obtained and used as the start time for other detectors. A readout electronics system was designed for the T0 detector. Based on the NINO ASIC, front-end-electronics (FEE) circuits which can achieve high precision leading-edge discrimination and Charge-to-Time Conversion (QTC) were designed for the internal and external MRPCs of the T0 detector. The output pulse of the FEE is then digitized by high precision time digitization modules with Time-to-Digital Converters (TDCs), trigger matching and other control logic integrated within Field Programmable Gate Array (FPGA) devices. To evaluate the functionality and performance, we also conducted a series of tests of the electronics. Results indicate that the system functions well and the time precision of the electronics is better than 21 ps, which satisfies the application requirement.

physics.ins-det

An 8-Gs/s 12-Bit TIADC System With Real-Time Broadband Mismatch Error Correction

High sampling speed can be achieved using multiple Analog-to-Digital Converters (ADCs) based on the Time-Interleaving A/D Conversion (TIADC) technique. Various types of methods were proposed to correct the mismatch errors among parallel ADC channels in TIADC systems, which would deteriorate the system performance. Traditional correction methods based on digital signal processing have good performance, however often only for input signals limited in a narrow frequency band. In this paper, we present our recent work on design of an 8-Gsps 12-bit TIADC system and implementation of real-time mismatch correction algorithms in FPGA devices, over a broad band of input signal frequencies. Tests were also conducted to evaluate the systems performance, and the results indicate that the Effective Number of Bits (ENOB) is enhanced to be better than 8.5 bits (<800 MHz) and 8 bits from 800 MHz to 1.6 GHz after correction, almost the same with that of the ADC chip employed.

physics.ins-det