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arXiv · 2009.07121

A 4-Channel 10-Gbps/ch CMOS VCSEL Array Driver with on-chip Charge-pumps

X. Huang·D. Gong·Q. Sun·C. Chen·D. Guo·S. Hou·G. Huang·S. Kulis·C. Liu·T. Liu·P. Moreira·A. Sánchez Rodríguez·H. Sun·J. Troska·L. Xiao·L. Zhang·W. Zhang·J. Ye
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Abstract

We present the design and test results of a 4-channel 10-Gbps/ch Vertical-Cavity Surface-Emitting Laser array driver, the cpVLAD. With on-chip charge-pumps to extend the biasing headroom for the VCSELs needed for low temperature operation and mitigation of the radiation effects. The cpVLAD was fabricated in a 65-nm CMOS technology. The test results show that the cpVLAD is capable of driving VCSELs with forward bias voltages as high as 2.8 V from a 2.5 V power supply. The power consumption of the cpVLAD is 94 mW/ch.

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X. Huang, D. Gong, Q. Sun, C. Chen, D. Guo, S. Hou, G. Huang, S. Kulis, C. Liu, T. Liu, P. Moreira, A. Sánchez Rodríguez, H. Sun, J. Troska, L. Xiao, L. Zhang, W. Zhang, J. Ye. 2020-09-14. A 4-Channel 10-Gbps/ch CMOS VCSEL Array Driver with on-chip Charge-pumps. https://doi.org/10.22323/1.370.0048

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